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opengl: Implement LOP.CC
Used by MH:Rise
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parent
f94f0be521
commit
8289eb108f
@ -7,6 +7,30 @@
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#include "shader_recompiler/frontend/ir/value.h"
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#include "shader_recompiler/frontend/ir/value.h"
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namespace Shader::Backend::GLASM {
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namespace Shader::Backend::GLASM {
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namespace {
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void BitwiseLogicalOp(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b,
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std::string_view lop) {
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const auto zero = inst.GetAssociatedPseudoOperation(IR::Opcode::GetZeroFromOp);
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const auto sign = inst.GetAssociatedPseudoOperation(IR::Opcode::GetSignFromOp);
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if (zero) {
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zero->Invalidate();
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}
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if (sign) {
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sign->Invalidate();
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}
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if (zero || sign) {
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ctx.reg_alloc.InvalidateConditionCodes();
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}
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const auto ret{ctx.reg_alloc.Define(inst)};
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ctx.Add("{}.S {}.x,{},{};", lop, ret, a, b);
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if (zero) {
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ctx.Add("SEQ.S {},{},0;", *zero, ret);
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}
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if (sign) {
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ctx.Add("SLT.S {},{},0;", *sign, ret);
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}
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}
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} // Anonymous namespace
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void EmitIAdd32(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b) {
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void EmitIAdd32(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b) {
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const std::array flags{
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const std::array flags{
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@ -110,15 +134,15 @@ void EmitShiftRightArithmetic64(EmitContext& ctx, IR::Inst& inst, ScalarRegister
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}
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}
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void EmitBitwiseAnd32(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b) {
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void EmitBitwiseAnd32(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b) {
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ctx.Add("AND.S {}.x,{},{};", inst, a, b);
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BitwiseLogicalOp(ctx, inst, a, b, "AND");
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}
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}
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void EmitBitwiseOr32(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b) {
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void EmitBitwiseOr32(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b) {
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ctx.Add("OR.S {}.x,{},{};", inst, a, b);
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BitwiseLogicalOp(ctx, inst, a, b, "OR");
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}
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}
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void EmitBitwiseXor32(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b) {
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void EmitBitwiseXor32(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b) {
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ctx.Add("XOR.S {}.x,{},{};", inst, a, b);
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BitwiseLogicalOp(ctx, inst, a, b, "XOR");
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}
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}
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void EmitBitFieldInsert(EmitContext& ctx, IR::Inst& inst, ScalarS32 base, ScalarS32 insert,
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void EmitBitFieldInsert(EmitContext& ctx, IR::Inst& inst, ScalarS32 base, ScalarS32 insert,
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@ -27,6 +27,14 @@ void SetSignFlag(EmitContext& ctx, IR::Inst& inst, std::string_view result) {
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ctx.AddU1("{}=int({})<0;", *sign, result);
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ctx.AddU1("{}=int({})<0;", *sign, result);
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sign->Invalidate();
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sign->Invalidate();
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}
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}
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void BitwiseLogicalOp(EmitContext& ctx, IR::Inst& inst, std::string_view a, std::string_view b,
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char lop) {
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const auto result{ctx.var_alloc.Define(inst, GlslVarType::U32)};
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ctx.Add("{}={}{}{};", result, a, lop, b);
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SetZeroFlag(ctx, inst, result);
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SetSignFlag(ctx, inst, result);
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}
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} // Anonymous namespace
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} // Anonymous namespace
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void EmitIAdd32(EmitContext& ctx, IR::Inst& inst, std::string_view a, std::string_view b) {
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void EmitIAdd32(EmitContext& ctx, IR::Inst& inst, std::string_view a, std::string_view b) {
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@ -113,15 +121,15 @@ void EmitShiftRightArithmetic64(EmitContext& ctx, IR::Inst& inst, std::string_vi
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}
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}
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void EmitBitwiseAnd32(EmitContext& ctx, IR::Inst& inst, std::string_view a, std::string_view b) {
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void EmitBitwiseAnd32(EmitContext& ctx, IR::Inst& inst, std::string_view a, std::string_view b) {
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ctx.AddU32("{}={}&{};", inst, a, b);
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BitwiseLogicalOp(ctx, inst, a, b, '&');
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}
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}
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void EmitBitwiseOr32(EmitContext& ctx, IR::Inst& inst, std::string_view a, std::string_view b) {
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void EmitBitwiseOr32(EmitContext& ctx, IR::Inst& inst, std::string_view a, std::string_view b) {
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ctx.AddU32("{}={}|{};", inst, a, b);
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BitwiseLogicalOp(ctx, inst, a, b, '|');
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}
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}
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void EmitBitwiseXor32(EmitContext& ctx, IR::Inst& inst, std::string_view a, std::string_view b) {
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void EmitBitwiseXor32(EmitContext& ctx, IR::Inst& inst, std::string_view a, std::string_view b) {
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ctx.AddU32("{}={}^{};", inst, a, b);
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BitwiseLogicalOp(ctx, inst, a, b, '^');
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}
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}
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void EmitBitFieldInsert(EmitContext& ctx, IR::Inst& inst, std::string_view base,
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void EmitBitFieldInsert(EmitContext& ctx, IR::Inst& inst, std::string_view base,
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