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Shader: Fix size_t to int casts of register offsets
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f5a49df679
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@ -289,13 +289,13 @@ struct UnitState {
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DebugData<Debug> debug;
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static int InputOffset(const SourceRegister& reg) {
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static size_t InputOffset(const SourceRegister& reg) {
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switch (reg.GetRegisterType()) {
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case RegisterType::Input:
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return (int)offsetof(UnitState::Registers, input) + reg.GetIndex()*sizeof(Math::Vec4<float24>);
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return offsetof(UnitState::Registers, input) + reg.GetIndex()*sizeof(Math::Vec4<float24>);
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case RegisterType::Temporary:
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return (int)offsetof(UnitState::Registers, temporary) + reg.GetIndex()*sizeof(Math::Vec4<float24>);
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return offsetof(UnitState::Registers, temporary) + reg.GetIndex()*sizeof(Math::Vec4<float24>);
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default:
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UNREACHABLE();
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@ -303,13 +303,13 @@ struct UnitState {
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}
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}
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static int OutputOffset(const DestRegister& reg) {
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static size_t OutputOffset(const DestRegister& reg) {
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switch (reg.GetRegisterType()) {
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case RegisterType::Output:
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return (int)offsetof(UnitState::Registers, output) + reg.GetIndex()*sizeof(Math::Vec4<float24>);
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return offsetof(UnitState::Registers, output) + reg.GetIndex()*sizeof(Math::Vec4<float24>);
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case RegisterType::Temporary:
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return (int)offsetof(UnitState::Registers, temporary) + reg.GetIndex()*sizeof(Math::Vec4<float24>);
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return offsetof(UnitState::Registers, temporary) + reg.GetIndex()*sizeof(Math::Vec4<float24>);
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default:
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UNREACHABLE();
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@ -144,7 +144,7 @@ static const u8 NO_DEST_REG_MASK = 0xf;
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*/
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void JitCompiler::Compile_SwizzleSrc(Instruction instr, unsigned src_num, SourceRegister src_reg, X64Reg dest) {
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X64Reg src_ptr;
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int src_offset;
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size_t src_offset;
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if (src_reg.GetRegisterType() == RegisterType::FloatUniform) {
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src_ptr = UNIFORMS;
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@ -154,6 +154,9 @@ void JitCompiler::Compile_SwizzleSrc(Instruction instr, unsigned src_num, Source
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src_offset = UnitState<false>::InputOffset(src_reg);
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}
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int src_offset_disp = (int)src_offset;
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ASSERT_MSG(src_offset == src_offset_disp, "Source register offset too large for int type");
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unsigned operand_desc_id;
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if (instr.opcode.Value().EffectiveOpCode() == OpCode::Id::MAD ||
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instr.opcode.Value().EffectiveOpCode() == OpCode::Id::MADI) {
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@ -163,7 +166,7 @@ void JitCompiler::Compile_SwizzleSrc(Instruction instr, unsigned src_num, Source
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operand_desc_id = instr.mad.operand_desc_id;
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// Load the source
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MOVAPS(dest, MDisp(src_ptr, src_offset));
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MOVAPS(dest, MDisp(src_ptr, src_offset_disp));
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} else {
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operand_desc_id = instr.common.operand_desc_id;
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@ -173,13 +176,13 @@ void JitCompiler::Compile_SwizzleSrc(Instruction instr, unsigned src_num, Source
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if (src_num == offset_src && instr.common.address_register_index != 0) {
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switch (instr.common.address_register_index) {
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case 1: // address offset 1
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MOVAPS(dest, MComplex(src_ptr, ADDROFFS_REG_0, 1, src_offset));
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MOVAPS(dest, MComplex(src_ptr, ADDROFFS_REG_0, 1, src_offset_disp));
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break;
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case 2: // address offset 2
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MOVAPS(dest, MComplex(src_ptr, ADDROFFS_REG_1, 1, src_offset));
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MOVAPS(dest, MComplex(src_ptr, ADDROFFS_REG_1, 1, src_offset_disp));
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break;
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case 3: // adddress offet 3
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MOVAPS(dest, MComplex(src_ptr, LOOPCOUNT_REG, 1, src_offset));
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MOVAPS(dest, MComplex(src_ptr, LOOPCOUNT_REG, 1, src_offset_disp));
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break;
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default:
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UNREACHABLE();
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@ -187,7 +190,7 @@ void JitCompiler::Compile_SwizzleSrc(Instruction instr, unsigned src_num, Source
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}
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} else {
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// Load the source
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MOVAPS(dest, MDisp(src_ptr, src_offset));
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MOVAPS(dest, MDisp(src_ptr, src_offset_disp));
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}
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}
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@ -224,14 +227,17 @@ void JitCompiler::Compile_DestEnable(Instruction instr,X64Reg src) {
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SwizzlePattern swiz = { g_state.vs.swizzle_data[operand_desc_id] };
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int dest_offset_disp = (int)UnitState<false>::OutputOffset(dest);
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ASSERT_MSG(dest_offset_disp == UnitState<false>::OutputOffset(dest), "Destinaton offset too large for int type");
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// If all components are enabled, write the result to the destination register
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if (swiz.dest_mask == NO_DEST_REG_MASK) {
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// Store dest back to memory
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MOVAPS(MDisp(REGISTERS, UnitState<false>::OutputOffset(dest)), src);
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MOVAPS(MDisp(REGISTERS, dest_offset_disp), src);
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} else {
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// Not all components are enabled, so mask the result when storing to the destination register...
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MOVAPS(SCRATCH, MDisp(REGISTERS, UnitState<false>::OutputOffset(dest)));
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MOVAPS(SCRATCH, MDisp(REGISTERS, dest_offset_disp));
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if (Common::GetCPUCaps().sse4_1) {
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u8 mask = ((swiz.dest_mask & 1) << 3) | ((swiz.dest_mask & 8) >> 3) | ((swiz.dest_mask & 2) << 1) | ((swiz.dest_mask & 4) >> 1);
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@ -250,7 +256,7 @@ void JitCompiler::Compile_DestEnable(Instruction instr,X64Reg src) {
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}
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// Store dest back to memory
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MOVAPS(MDisp(REGISTERS, UnitState<false>::OutputOffset(dest)), SCRATCH);
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MOVAPS(MDisp(REGISTERS, dest_offset_disp), SCRATCH);
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}
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}
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