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Merge pull request #458 from Subv/fmnmx
Shaders: Implemented the FMNMX shader instruction.
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commit
898f0fa029
@ -193,6 +193,11 @@ union Instruction {
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BitField<50, 1, u64> abs_d;
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BitField<56, 1, u64> negate_imm;
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union {
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BitField<39, 3, u64> pred;
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BitField<42, 1, u64> negate_pred;
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} fmnmx;
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float GetImm20_19() const {
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float result{};
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u32 imm{static_cast<u32>(imm20_19)};
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@ -580,14 +580,17 @@ private:
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* @param instr Instruction to generate the if condition for.
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* @returns string containing the predicate condition.
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*/
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std::string GetPredicateCondition(Instruction instr) const {
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std::string GetPredicateCondition(u64 index, bool negate) const {
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using Tegra::Shader::Pred;
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ASSERT(instr.pred.pred_index != static_cast<u64>(Pred::UnusedIndex));
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std::string variable;
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std::string variable =
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'p' + std::to_string(static_cast<u64>(instr.pred.pred_index.Value()));
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// Index 7 is used as an 'Always True' condition.
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if (index == static_cast<u64>(Pred::UnusedIndex))
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variable = "true";
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else
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variable = 'p' + std::to_string(index);
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if (instr.negate_pred) {
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if (negate) {
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return "!(" + variable + ')';
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}
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@ -634,7 +637,9 @@ private:
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"NeverExecute predicate not implemented");
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if (instr.pred.pred_index != static_cast<u64>(Pred::UnusedIndex)) {
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shader.AddLine("if (" + GetPredicateCondition(instr) + ')');
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shader.AddLine("if (" +
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GetPredicateCondition(instr.pred.pred_index, instr.negate_pred != 0) +
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')');
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shader.AddLine('{');
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++shader.scope;
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}
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@ -730,6 +735,16 @@ private:
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}
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break;
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}
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case OpCode::Id::FMNMX: {
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std::string condition =
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GetPredicateCondition(instr.alu.fmnmx.pred, instr.alu.fmnmx.negate_pred != 0);
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std::string parameters = op_a + ',' + op_b;
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regs.SetRegisterToFloat(instr.gpr0, 0,
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'(' + condition + ") ? min(" + parameters + ") : max(" +
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parameters + ')',
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1, 1);
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break;
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}
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case OpCode::Id::RRO: {
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NGLOG_DEBUG(HW_GPU, "Skipping RRO instruction");
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break;
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