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https://github.com/yuzu-emu/yuzu.git
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vk_rasterizer: Reimplement clears with vkCmdClearAttachments
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c51dbf8038
commit
8baf98e439
@ -179,10 +179,11 @@ Tegra::Engines::ConstBufferEngineInterface& CachedShader::GetEngine(
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VKPipelineCache::VKPipelineCache(Core::System& system, RasterizerVulkan& rasterizer,
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const VKDevice& device, VKScheduler& scheduler,
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VKDescriptorPool& descriptor_pool,
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VKUpdateDescriptorQueue& update_descriptor_queue)
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VKUpdateDescriptorQueue& update_descriptor_queue,
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VKRenderPassCache& renderpass_cache)
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: RasterizerCache{rasterizer}, system{system}, device{device}, scheduler{scheduler},
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descriptor_pool{descriptor_pool}, update_descriptor_queue{update_descriptor_queue},
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renderpass_cache(device) {}
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renderpass_cache{renderpass_cache} {}
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VKPipelineCache::~VKPipelineCache() = default;
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@ -161,7 +161,8 @@ public:
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explicit VKPipelineCache(Core::System& system, RasterizerVulkan& rasterizer,
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const VKDevice& device, VKScheduler& scheduler,
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VKDescriptorPool& descriptor_pool,
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VKUpdateDescriptorQueue& update_descriptor_queue);
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VKUpdateDescriptorQueue& update_descriptor_queue,
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VKRenderPassCache& renderpass_cache);
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~VKPipelineCache();
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std::array<Shader, Maxwell::MaxShaderProgram> GetShaders();
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@ -184,8 +185,7 @@ private:
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VKScheduler& scheduler;
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VKDescriptorPool& descriptor_pool;
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VKUpdateDescriptorQueue& update_descriptor_queue;
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VKRenderPassCache renderpass_cache;
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VKRenderPassCache& renderpass_cache;
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std::array<Shader, Maxwell::MaxShaderProgram> last_shaders;
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@ -287,12 +287,13 @@ RasterizerVulkan::RasterizerVulkan(Core::System& system, Core::Frontend::EmuWind
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screen_info{screen_info}, device{device}, resource_manager{resource_manager},
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memory_manager{memory_manager}, state_tracker{state_tracker}, scheduler{scheduler},
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staging_pool(device, memory_manager, scheduler), descriptor_pool(device),
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update_descriptor_queue(device, scheduler),
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update_descriptor_queue(device, scheduler), renderpass_cache(device),
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quad_array_pass(device, scheduler, descriptor_pool, staging_pool, update_descriptor_queue),
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uint8_pass(device, scheduler, descriptor_pool, staging_pool, update_descriptor_queue),
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texture_cache(system, *this, device, resource_manager, memory_manager, scheduler,
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staging_pool),
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pipeline_cache(system, *this, device, scheduler, descriptor_pool, update_descriptor_queue),
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pipeline_cache(system, *this, device, scheduler, descriptor_pool, update_descriptor_queue,
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renderpass_cache),
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buffer_cache(*this, system, device, memory_manager, scheduler, staging_pool),
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sampler_cache(device), query_cache(system, *this, device, scheduler) {
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scheduler.SetQueryCache(query_cache);
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@ -365,13 +366,16 @@ void RasterizerVulkan::Draw(bool is_indexed, bool is_instanced) {
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void RasterizerVulkan::Clear() {
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MICROPROFILE_SCOPE(Vulkan_Clearing);
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query_cache.UpdateCounters();
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const auto& gpu = system.GPU().Maxwell3D();
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if (!system.GPU().Maxwell3D().ShouldExecute()) {
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return;
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}
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sampled_views.clear();
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image_views.clear();
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query_cache.UpdateCounters();
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const auto& regs = gpu.regs;
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const bool use_color = regs.clear_buffers.R || regs.clear_buffers.G || regs.clear_buffers.B ||
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regs.clear_buffers.A;
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@ -380,52 +384,54 @@ void RasterizerVulkan::Clear() {
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if (!use_color && !use_depth && !use_stencil) {
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return;
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}
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// Clearing images requires to be out of a renderpass
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scheduler.RequestOutsideRenderPassOperationContext();
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// TODO(Rodrigo): Implement clears rendering a quad or using beginning a renderpass.
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[[maybe_unused]] const auto texceptions = UpdateAttachments();
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DEBUG_ASSERT(texceptions.none());
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SetupImageTransitions(0, color_attachments, zeta_attachment);
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const vk::RenderPass renderpass = renderpass_cache.GetRenderPass(GetRenderPassParams(0));
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const auto [framebuffer, render_area] = ConfigureFramebuffers(renderpass);
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scheduler.RequestRenderpass({renderpass, framebuffer, {{0, 0}, render_area}, 0, nullptr});
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const auto& scissor = regs.scissor_test[0];
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const vk::Offset2D scissor_offset(scissor.min_x, scissor.min_y);
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vk::Extent2D scissor_extent{scissor.max_x - scissor.min_x, scissor.max_y - scissor.min_y};
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scissor_extent.width = std::min(scissor_extent.width, render_area.width);
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scissor_extent.height = std::min(scissor_extent.height, render_area.height);
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// TODO(Rodrigo): Implement layer clears
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const vk::ClearRect clear_rect({scissor_offset, scissor_extent}, 0, 1);
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if (use_color) {
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View color_view;
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{
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MICROPROFILE_SCOPE(Vulkan_RenderTargets);
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color_view = texture_cache.GetColorBufferSurface(regs.clear_buffers.RT.Value(), false);
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}
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color_view->Transition(vk::ImageLayout::eTransferDstOptimal,
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vk::PipelineStageFlagBits::eTransfer,
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vk::AccessFlagBits::eTransferWrite);
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const std::array clear_color = {regs.clear_color[0], regs.clear_color[1],
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regs.clear_color[2], regs.clear_color[3]};
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const vk::ClearColorValue clear(clear_color);
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scheduler.Record([image = color_view->GetImage(),
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subresource = color_view->GetImageSubresourceRange(),
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clear](auto cmdbuf, auto& dld) {
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cmdbuf.clearColorImage(image, vk::ImageLayout::eTransferDstOptimal, clear, subresource,
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dld);
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const vk::ClearValue clear_value{clear_color};
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const u32 color_attachment = regs.clear_buffers.RT;
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scheduler.Record([color_attachment, clear_value, clear_rect](auto cmdbuf, auto& dld) {
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const vk::ClearAttachment attachment(vk::ImageAspectFlagBits::eColor, color_attachment,
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clear_value);
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cmdbuf.clearAttachments(1, &attachment, 1, &clear_rect, dld);
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});
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}
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if (use_depth || use_stencil) {
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View zeta_surface;
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{
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MICROPROFILE_SCOPE(Vulkan_RenderTargets);
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zeta_surface = texture_cache.GetDepthBufferSurface(false);
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}
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zeta_surface->Transition(vk::ImageLayout::eTransferDstOptimal,
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vk::PipelineStageFlagBits::eTransfer,
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vk::AccessFlagBits::eTransferWrite);
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const vk::ClearDepthStencilValue clear(regs.clear_depth,
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static_cast<u32>(regs.clear_stencil));
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scheduler.Record([image = zeta_surface->GetImage(),
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subresource = zeta_surface->GetImageSubresourceRange(),
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clear](auto cmdbuf, auto& dld) {
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cmdbuf.clearDepthStencilImage(image, vk::ImageLayout::eTransferDstOptimal, clear,
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subresource, dld);
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});
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if (!use_depth && !use_stencil) {
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return;
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}
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vk::ImageAspectFlags aspect_flags;
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if (use_depth) {
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aspect_flags |= vk::ImageAspectFlagBits::eDepth;
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}
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if (use_stencil) {
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aspect_flags |= vk::ImageAspectFlagBits::eStencil;
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}
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scheduler.Record([clear_depth = regs.clear_depth, clear_stencil = regs.clear_stencil,
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clear_rect, aspect_flags](auto cmdbuf, auto& dld) {
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const vk::ClearDepthStencilValue clear_zeta(clear_depth, clear_stencil);
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const vk::ClearValue clear_value{clear_zeta};
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const vk::ClearAttachment attachment(aspect_flags, 0, clear_value);
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cmdbuf.clearAttachments(1, &attachment, 1, &clear_rect, dld);
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});
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}
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void RasterizerVulkan::DispatchCompute(GPUVAddr code_addr) {
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@ -253,6 +253,7 @@ private:
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VKStagingBufferPool staging_pool;
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VKDescriptorPool descriptor_pool;
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VKUpdateDescriptorQueue update_descriptor_queue;
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VKRenderPassCache renderpass_cache;
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QuadArrayPass quad_array_pass;
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Uint8Pass uint8_pass;
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