mirror of
https://github.com/yuzu-emu/yuzu.git
synced 2024-08-23 03:00:41 +02:00
commit
8fb064cd62
@ -27,7 +27,7 @@ u64 g_last_frame_ticks = 0; ///< CPU tick count from last frame
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template <typename T>
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inline void Read(T &var, const u32 raw_addr) {
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u32 addr = raw_addr - 0x1EF00000;
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int index = addr / 4;
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u32 index = addr / 4;
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// Reads other than u32 are untested, so I'd rather have them abort than silently fail
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if (index >= Regs::NumIds() || !std::is_same<T,u32>::value) {
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@ -41,7 +41,7 @@ inline void Read(T &var, const u32 raw_addr) {
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template <typename T>
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inline void Write(u32 addr, const T data) {
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addr -= 0x1EF00000;
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int index = addr / 4;
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u32 index = addr / 4;
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// Writes other than u32 are untested, so I'd rather have them abort than silently fail
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if (index >= Regs::NumIds() || !std::is_same<T,u32>::value) {
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@ -201,7 +201,7 @@ struct Regs {
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#undef INSERT_PADDING_WORDS_HELPER2
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#undef INSERT_PADDING_WORDS
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static inline int NumIds() {
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static inline size_t NumIds() {
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return sizeof(Regs) / sizeof(u32);
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}
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@ -86,8 +86,8 @@ static void InitScreenCoordinates(OutputVertex& vtx)
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viewport.halfsize_x = float24::FromRawFloat24(registers.viewport_size_x);
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viewport.halfsize_y = float24::FromRawFloat24(registers.viewport_size_y);
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viewport.offset_x = float24::FromFloat32(registers.viewport_corner.x);
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viewport.offset_y = float24::FromFloat32(registers.viewport_corner.y);
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viewport.offset_x = float24::FromFloat32(static_cast<float>(registers.viewport_corner.x));
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viewport.offset_y = float24::FromFloat32(static_cast<float>(registers.viewport_corner.y));
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viewport.zscale = float24::FromRawFloat24(registers.viewport_depth_range);
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viewport.offset_z = float24::FromRawFloat24(registers.viewport_depth_far_plane);
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@ -150,7 +150,7 @@ void ProcessTriangle(OutputVertex &v0, OutputVertex &v1, OutputVertex &v2) {
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InitScreenCoordinates(*(output_list[0]));
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InitScreenCoordinates(*(output_list[1]));
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for (int i = 0; i < output_list.size() - 2; i ++) {
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for (size_t i = 0; i < output_list.size() - 2; i ++) {
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OutputVertex& vtx0 = *(output_list[0]);
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OutputVertex& vtx1 = *(output_list[i+1]);
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OutputVertex& vtx2 = *(output_list[i+2]);
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@ -158,7 +158,7 @@ void ProcessTriangle(OutputVertex &v0, OutputVertex &v1, OutputVertex &v2) {
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InitScreenCoordinates(vtx2);
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DEBUG_LOG(GPU,
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"Triangle %d/%d (%d buffer vertices) at position (%.3f, %.3f, %.3f, %.3f), "
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"Triangle %u/%u (%u buffer vertices) at position (%.3f, %.3f, %.3f, %.3f), "
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"(%.3f, %.3f, %.3f, %.3f), (%.3f, %.3f, %.3f, %.3f) and "
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"screen position (%.2f, %.2f, %.2f), (%.2f, %.2f, %.2f), (%.2f, %.2f, %.2f)",
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i,output_list.size(), buffer_vertices.size(),
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@ -63,8 +63,8 @@ static inline void WritePicaReg(u32 id, u32 value, u32 mask) {
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for (int component = 0; component < loader_config.component_count; ++component) {
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u32 attribute_index = loader_config.GetComponent(component);
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vertex_attribute_sources[attribute_index] = load_address;
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vertex_attribute_strides[attribute_index] = loader_config.byte_count;
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vertex_attribute_formats[attribute_index] = (u32)attribute_config.GetFormat(attribute_index);
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vertex_attribute_strides[attribute_index] = static_cast<u32>(loader_config.byte_count);
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vertex_attribute_formats[attribute_index] = static_cast<u32>(attribute_config.GetFormat(attribute_index));
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vertex_attribute_elements[attribute_index] = attribute_config.GetNumElements(attribute_index);
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vertex_attribute_element_size[attribute_index] = attribute_config.GetElementSizeInBytes(attribute_index);
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load_address += attribute_config.GetStride(attribute_index);
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@ -83,9 +83,9 @@ static inline void WritePicaReg(u32 id, u32 value, u32 mask) {
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PrimitiveAssembler<VertexShader::OutputVertex> clipper_primitive_assembler(registers.triangle_topology.Value());
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PrimitiveAssembler<DebugUtils::GeometryDumper::Vertex> dumping_primitive_assembler(registers.triangle_topology.Value());
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for (int index = 0; index < registers.num_vertices; ++index)
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for (unsigned int index = 0; index < registers.num_vertices; ++index)
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{
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int vertex = is_indexed ? (index_u16 ? index_address_16[index] : index_address_8[index]) : index;
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unsigned int vertex = is_indexed ? (index_u16 ? index_address_16[index] : index_address_8[index]) : index;
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if (is_indexed) {
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// TODO: Implement some sort of vertex cache!
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@ -95,7 +95,7 @@ static inline void WritePicaReg(u32 id, u32 value, u32 mask) {
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VertexShader::InputVertex input;
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for (int i = 0; i < attribute_config.GetNumTotalAttributes(); ++i) {
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for (int comp = 0; comp < vertex_attribute_elements[i]; ++comp) {
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for (unsigned int comp = 0; comp < vertex_attribute_elements[i]; ++comp) {
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const u8* srcdata = vertex_attribute_sources[i] + vertex_attribute_strides[i] * vertex + comp * vertex_attribute_element_size[i];
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const float srcval = (vertex_attribute_formats[i] == 0) ? *(s8*)srcdata :
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(vertex_attribute_formats[i] == 1) ? *(u8*)srcdata :
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@ -244,7 +244,7 @@ static std::ptrdiff_t ExecuteCommandBlock(const u32* first_command_word) {
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WritePicaReg(header.cmd_id, *read_pointer, write_mask);
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read_pointer += 2;
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for (int i = 1; i < 1+header.extra_data_length; ++i) {
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for (unsigned int i = 1; i < 1+header.extra_data_length; ++i) {
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u32 cmd = header.cmd_id + ((header.group_commands) ? i : 0);
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WritePicaReg(cmd, *read_pointer, write_mask);
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++read_pointer;
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@ -203,7 +203,7 @@ void DumpShader(const u32* binary_data, u32 binary_size, const u32* swizzle_data
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} else {
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it->component_mask = it->component_mask | component_mask;
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}
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} catch (const std::out_of_range& oor) {
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} catch (const std::out_of_range& ) {
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_dbg_assert_msg_(GPU, 0, "Unknown output attribute mapping");
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ERROR_LOG(GPU, "Unknown output attribute mapping: %03x, %03x, %03x, %03x",
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(int)output_attributes[i].map_x.Value(),
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@ -235,7 +235,7 @@ void DumpShader(const u32* binary_data, u32 binary_size, const u32* swizzle_data
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dvlp.swizzle_patterns_offset = write_offset - dvlp_offset;
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dvlp.swizzle_patterns_num_entries = swizzle_size;
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u32 dummy = 0;
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for (int i = 0; i < swizzle_size; ++i) {
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for (unsigned int i = 0; i < swizzle_size; ++i) {
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QueueForWriting((u8*)&swizzle_data[i], sizeof(swizzle_data[i]));
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QueueForWriting((u8*)&dummy, sizeof(dummy));
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}
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@ -278,7 +278,7 @@ void StartPicaTracing()
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bool IsPicaTracing()
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{
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return is_pica_tracing;
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return is_pica_tracing != 0;
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}
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void OnPicaRegWrite(u32 id, u32 value)
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@ -428,7 +428,7 @@ void DumpTevStageConfig(const std::array<Pica::Regs::TevStageConfig,6>& stages)
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using Operation = Pica::Regs::TevStageConfig::Operation;
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std::string stage_info = "Tev setup:\n";
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for (int index = 0; index < stages.size(); ++index) {
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for (size_t index = 0; index < stages.size(); ++index) {
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const auto& tev_stage = stages[index];
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const std::map<Source, std::string> source_map = {
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@ -563,7 +563,7 @@ struct Regs {
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return map[index];
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}
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static inline int NumIds() {
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static inline size_t NumIds() {
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return sizeof(Regs) / sizeof(u32);
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}
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@ -65,7 +65,7 @@ void ProcessTriangle(const VertexShader::OutputVertex& v0,
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// vertex positions in rasterizer coordinates
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auto FloatToFix = [](float24 flt) {
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return Fix12P4(flt.ToFloat32() * 16.0f);
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return Fix12P4(static_cast<unsigned short>(flt.ToFloat32() * 16.0f));
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};
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auto ScreenToRasterizerCoordinates = [FloatToFix](const Math::Vec3<float24> vec) {
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return Math::Vec3<Fix12P4>{FloatToFix(vec.x), FloatToFix(vec.y), FloatToFix(vec.z)};
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@ -151,9 +151,9 @@ void ProcessTriangle(const VertexShader::OutputVertex& v0,
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auto w_inverse = Math::MakeVec(float24::FromFloat32(1.f) / v0.pos.w,
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float24::FromFloat32(1.f) / v1.pos.w,
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float24::FromFloat32(1.f) / v2.pos.w);
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auto baricentric_coordinates = Math::MakeVec(float24::FromFloat32(w0),
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float24::FromFloat32(w1),
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float24::FromFloat32(w2));
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auto baricentric_coordinates = Math::MakeVec(float24::FromFloat32(static_cast<float>(w0)),
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float24::FromFloat32(static_cast<float>(w1)),
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float24::FromFloat32(static_cast<float>(w2)));
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float24 interpolated_attr_over_w = Math::Dot(attr_over_w, baricentric_coordinates);
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float24 interpolated_w_inverse = Math::Dot(w_inverse, baricentric_coordinates);
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@ -195,8 +195,8 @@ void ProcessTriangle(const VertexShader::OutputVertex& v0,
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// TODO(neobrain): Not sure if this swizzling pattern is used for all textures.
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// To be flexible in case different but similar patterns are used, we keep this
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// somewhat inefficient code around for now.
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int s = (int)(u * float24::FromFloat32(registers.texture0.width)).ToFloat32();
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int t = (int)(v * float24::FromFloat32(registers.texture0.height)).ToFloat32();
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int s = (int)(u * float24::FromFloat32(static_cast<float>(registers.texture0.width))).ToFloat32();
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int t = (int)(v * float24::FromFloat32(static_cast<float>(registers.texture0.height))).ToFloat32();
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int texel_index_within_tile = 0;
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for (int block_size_index = 0; block_size_index < 3; ++block_size_index) {
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int sub_tile_width = 1 << block_size_index;
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@ -77,7 +77,7 @@ static void ProcessShaderCode(VertexShaderState& state) {
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: nullptr;
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const SwizzlePattern& swizzle = *(SwizzlePattern*)&swizzle_data[instr.common.operand_desc_id];
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const bool negate_src1 = swizzle.negate;
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const bool negate_src1 = (swizzle.negate != 0);
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float24 src1[4] = {
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src1_[(int)swizzle.GetSelectorSrc1(0)],
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@ -225,7 +225,7 @@ union SwizzlePattern {
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}
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bool DestComponentEnabled(int i) const {
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return (dest_mask & (0x8 >> i));
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return (dest_mask & (0x8 >> i)) != 0;
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}
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std::string SelectorToString(bool src2) const {
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