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https://github.com/yuzu-emu/yuzu.git
synced 2024-08-21 14:23:22 +02:00
Merge pull request #2476 from yuriks/shader-refactor3
Oh No! More shader changes!
This commit is contained in:
commit
97e06b0a0d
@ -71,8 +71,8 @@ void GraphicsTracingWidget::StartRecording() {
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std::array<u32, 4 * 16> default_attributes;
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for (unsigned i = 0; i < 16; ++i) {
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for (unsigned comp = 0; comp < 3; ++comp) {
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default_attributes[4 * i + comp] =
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nihstro::to_float24(Pica::g_state.vs_default_attributes[i][comp].ToFloat32());
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default_attributes[4 * i + comp] = nihstro::to_float24(
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Pica::g_state.input_default_attributes.attr[i][comp].ToFloat32());
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}
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}
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@ -511,7 +511,7 @@ void GraphicsVertexShaderWidget::Reload(bool replace_vertex_data, void* vertex_d
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auto& shader_config = Pica::g_state.regs.vs;
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for (auto instr : shader_setup.program_code)
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info.code.push_back({instr});
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int num_attributes = Pica::g_state.regs.vertex_attributes.GetNumTotalAttributes();
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int num_attributes = shader_config.max_input_attribute_index + 1;
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for (auto pattern : shader_setup.swizzle_data)
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info.swizzle_info.push_back({pattern});
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@ -522,11 +522,11 @@ void GraphicsVertexShaderWidget::Reload(bool replace_vertex_data, void* vertex_d
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// Generate debug information
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Pica::Shader::InterpreterEngine shader_engine;
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shader_engine.SetupBatch(shader_setup, entry_point);
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debug_data = shader_engine.ProduceDebugInfo(shader_setup, input_vertex, num_attributes);
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debug_data = shader_engine.ProduceDebugInfo(shader_setup, input_vertex, shader_config);
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// Reload widget state
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for (int attr = 0; attr < num_attributes; ++attr) {
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unsigned source_attr = shader_config.input_register_map.GetRegisterForAttribute(attr);
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unsigned source_attr = shader_config.GetRegisterForAttribute(attr);
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input_data_mapping[attr]->setText(QString("-> v%1").arg(source_attr));
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input_data_container[attr]->setVisible(true);
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}
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@ -82,7 +82,7 @@ private:
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nihstro::ShaderInfo info;
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Pica::Shader::DebugData<true> debug_data;
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Pica::Shader::InputVertex input_vertex;
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Pica::Shader::AttributeBuffer input_vertex;
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friend class GraphicsVertexShaderModel;
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};
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@ -121,22 +121,19 @@ public:
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class Iterator {
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public:
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Iterator(const Iterator& other) : m_val(other.m_val), m_bit(other.m_bit) {}
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Iterator(IntTy val, int bit) : m_val(val), m_bit(bit) {}
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Iterator(IntTy val) : m_val(val), m_bit(0) {}
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Iterator& operator=(Iterator other) {
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new (this) Iterator(other);
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return *this;
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}
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int operator*() {
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return m_bit;
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return m_bit + ComputeLsb();
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}
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Iterator& operator++() {
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if (m_val == 0) {
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m_bit = -1;
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} else {
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int bit = LeastSignificantSetBit(m_val);
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m_val &= ~(1 << bit);
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m_bit = bit;
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}
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int lsb = ComputeLsb();
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m_val >>= lsb + 1;
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m_bit += lsb + 1;
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m_has_lsb = false;
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return *this;
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}
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Iterator operator++(int _) {
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@ -145,15 +142,24 @@ public:
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return other;
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}
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bool operator==(Iterator other) const {
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return m_bit == other.m_bit;
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return m_val == other.m_val;
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}
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bool operator!=(Iterator other) const {
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return m_bit != other.m_bit;
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return m_val != other.m_val;
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}
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private:
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int ComputeLsb() {
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if (!m_has_lsb) {
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m_lsb = LeastSignificantSetBit(m_val);
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m_has_lsb = true;
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}
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return m_lsb;
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}
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IntTy m_val;
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int m_bit;
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int m_lsb = -1;
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bool m_has_lsb = false;
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};
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BitSet() : m_val(0) {}
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@ -221,11 +227,10 @@ public:
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}
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Iterator begin() const {
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Iterator it(m_val, 0);
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return ++it;
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return Iterator(m_val);
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}
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Iterator end() const {
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return Iterator(m_val, -1);
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return Iterator(0);
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}
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IntTy m_val;
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@ -18,6 +18,8 @@
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#include "video_core/rasterizer.h"
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#include "video_core/shader/shader.h"
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using Pica::Rasterizer::Vertex;
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namespace Pica {
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namespace Clipper {
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@ -29,20 +31,20 @@ public:
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float24::FromFloat32(0), float24::FromFloat32(0)))
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: coeffs(coeffs), bias(bias) {}
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bool IsInside(const OutputVertex& vertex) const {
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bool IsInside(const Vertex& vertex) const {
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return Math::Dot(vertex.pos + bias, coeffs) <= float24::FromFloat32(0);
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}
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bool IsOutSide(const OutputVertex& vertex) const {
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bool IsOutSide(const Vertex& vertex) const {
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return !IsInside(vertex);
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}
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OutputVertex GetIntersection(const OutputVertex& v0, const OutputVertex& v1) const {
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Vertex GetIntersection(const Vertex& v0, const Vertex& v1) const {
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float24 dp = Math::Dot(v0.pos + bias, coeffs);
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float24 dp_prev = Math::Dot(v1.pos + bias, coeffs);
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float24 factor = dp_prev / (dp_prev - dp);
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return OutputVertex::Lerp(factor, v0, v1);
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return Vertex::Lerp(factor, v0, v1);
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}
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private:
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@ -51,7 +53,7 @@ private:
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Math::Vec4<float24> bias;
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};
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static void InitScreenCoordinates(OutputVertex& vtx) {
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static void InitScreenCoordinates(Vertex& vtx) {
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struct {
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float24 halfsize_x;
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float24 offset_x;
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@ -91,8 +93,8 @@ void ProcessTriangle(const OutputVertex& v0, const OutputVertex& v1, const Outpu
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// introduces at most 1 new vertex to the polygon. Since we start with a triangle and have a
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// fixed 6 clipping planes, the maximum number of vertices of the clipped polygon is 3 + 6 = 9.
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static const size_t MAX_VERTICES = 9;
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static_vector<OutputVertex, MAX_VERTICES> buffer_a = {v0, v1, v2};
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static_vector<OutputVertex, MAX_VERTICES> buffer_b;
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static_vector<Vertex, MAX_VERTICES> buffer_a = {v0, v1, v2};
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static_vector<Vertex, MAX_VERTICES> buffer_b;
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auto* output_list = &buffer_a;
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auto* input_list = &buffer_b;
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@ -123,7 +125,7 @@ void ProcessTriangle(const OutputVertex& v0, const OutputVertex& v1, const Outpu
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std::swap(input_list, output_list);
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output_list->clear();
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const OutputVertex* reference_vertex = &input_list->back();
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const Vertex* reference_vertex = &input_list->back();
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for (const auto& vertex : *input_list) {
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// NOTE: This algorithm changes vertex order in some cases!
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@ -148,9 +150,9 @@ void ProcessTriangle(const OutputVertex& v0, const OutputVertex& v1, const Outpu
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InitScreenCoordinates((*output_list)[1]);
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for (size_t i = 0; i < output_list->size() - 2; i++) {
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OutputVertex& vtx0 = (*output_list)[0];
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OutputVertex& vtx1 = (*output_list)[i + 1];
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OutputVertex& vtx2 = (*output_list)[i + 2];
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Vertex& vtx0 = (*output_list)[0];
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Vertex& vtx1 = (*output_list)[i + 1];
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Vertex& vtx2 = (*output_list)[i + 2];
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InitScreenCoordinates(vtx2);
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@ -125,20 +125,21 @@ static void WritePicaReg(u32 id, u32 value, u32 mask) {
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// TODO: Verify that this actually modifies the register!
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if (setup.index < 15) {
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g_state.vs_default_attributes[setup.index] = attribute;
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g_state.input_default_attributes.attr[setup.index] = attribute;
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setup.index++;
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} else {
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// Put each attribute into an immediate input buffer.
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// When all specified immediate attributes are present, the Vertex Shader is invoked
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// and everything is
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// sent to the primitive assembler.
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// Put each attribute into an immediate input buffer. When all specified immediate
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// attributes are present, the Vertex Shader is invoked and everything is sent to
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// the primitive assembler.
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auto& immediate_input = g_state.immediate.input_vertex;
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auto& immediate_attribute_id = g_state.immediate.current_attribute;
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immediate_input.attr[immediate_attribute_id++] = attribute;
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immediate_input.attr[immediate_attribute_id] = attribute;
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if (immediate_attribute_id >= regs.vs.num_input_attributes + 1) {
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if (immediate_attribute_id < regs.max_input_attrib_index) {
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immediate_attribute_id += 1;
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} else {
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MICROPROFILE_SCOPE(GPU_Drawing);
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immediate_attribute_id = 0;
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@ -150,10 +151,11 @@ static void WritePicaReg(u32 id, u32 value, u32 mask) {
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g_debug_context->OnEvent(DebugContext::Event::VertexShaderInvocation,
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static_cast<void*>(&immediate_input));
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Shader::UnitState shader_unit;
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shader_unit.LoadInputVertex(immediate_input, regs.vs.num_input_attributes + 1);
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Shader::AttributeBuffer output{};
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shader_unit.LoadInput(regs.vs, immediate_input);
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shader_engine->Run(g_state.vs, shader_unit);
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auto output_vertex = Shader::OutputVertex::FromRegisters(
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shader_unit.registers.output, regs, regs.vs.output_mask);
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shader_unit.WriteOutput(regs.vs, output);
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// Send to renderer
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using Pica::Shader::OutputVertex;
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@ -162,7 +164,8 @@ static void WritePicaReg(u32 id, u32 value, u32 mask) {
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VideoCore::g_renderer->Rasterizer()->AddTriangle(v0, v1, v2);
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};
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g_state.primitive_assembler.SubmitVertex(output_vertex, AddTriangle);
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g_state.primitive_assembler.SubmitVertex(
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Shader::OutputVertex::FromAttributeBuffer(regs, output), AddTriangle);
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}
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}
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}
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@ -280,19 +283,19 @@ static void WritePicaReg(u32 id, u32 value, u32 mask) {
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if (!vertex_cache_hit) {
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// Initialize data for the current vertex
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Shader::InputVertex input;
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Shader::AttributeBuffer input, output{};
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loader.LoadVertex(base_address, index, vertex, input, memory_accesses);
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// Send to vertex shader
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if (g_debug_context)
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g_debug_context->OnEvent(DebugContext::Event::VertexShaderInvocation,
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(void*)&input);
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shader_unit.LoadInputVertex(input, loader.GetNumTotalAttributes());
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shader_unit.LoadInput(regs.vs, input);
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shader_engine->Run(g_state.vs, shader_unit);
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shader_unit.WriteOutput(regs.vs, output);
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// Retrieve vertex from register data
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output_vertex = Shader::OutputVertex::FromRegisters(shader_unit.registers.output,
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regs, regs.vs.output_mask);
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output_vertex = Shader::OutputVertex::FromAttributeBuffer(regs, output);
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if (is_indexed) {
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vertex_cache[vertex_cache_pos] = output_vertex;
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@ -99,7 +99,8 @@ struct Regs {
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TEXCOORD1_U = 14,
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TEXCOORD1_V = 15,
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// TODO: Not verified
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TEXCOORD0_W = 16,
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VIEW_X = 18,
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VIEW_Y = 19,
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VIEW_Z = 20,
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@ -871,7 +872,7 @@ struct Regs {
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LightSrc light[8];
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LightColor global_ambient; // Emission + (material.ambient * lighting.ambient)
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INSERT_PADDING_WORDS(0x1);
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BitField<0, 3, u32> num_lights; // Number of enabled lights - 1
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BitField<0, 3, u32> max_light_index; // Number of enabled lights - 1
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union {
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BitField<2, 2, LightingFresnelSelector> fresnel_selector;
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@ -1048,7 +1049,7 @@ struct Regs {
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BitField<48, 12, u64> attribute_mask;
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// number of total attributes minus 1
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BitField<60, 4, u64> num_extra_attributes;
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BitField<60, 4, u64> max_attribute_index;
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};
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inline VertexAttributeFormat GetFormat(int n) const {
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@ -1079,7 +1080,7 @@ struct Regs {
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}
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inline int GetNumTotalAttributes() const {
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return (int)num_extra_attributes + 1;
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return (int)max_attribute_index + 1;
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}
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// Attribute loaders map the source vertex data to input attributes
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@ -1179,7 +1180,12 @@ struct Regs {
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}
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} command_buffer;
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INSERT_PADDING_WORDS(0x07);
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INSERT_PADDING_WORDS(4);
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/// Number of input attributes to the vertex shader minus 1
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BitField<0, 4, u32> max_input_attrib_index;
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INSERT_PADDING_WORDS(2);
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enum class GPUMode : u32 {
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Drawing = 0,
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@ -1217,42 +1223,21 @@ struct Regs {
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union {
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// Number of input attributes to shader unit - 1
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BitField<0, 4, u32> num_input_attributes;
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BitField<0, 4, u32> max_input_attribute_index;
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};
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// Offset to shader program entry point (in words)
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BitField<0, 16, u32> main_offset;
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union {
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BitField<0, 4, u64> attribute0_register;
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BitField<4, 4, u64> attribute1_register;
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BitField<8, 4, u64> attribute2_register;
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BitField<12, 4, u64> attribute3_register;
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BitField<16, 4, u64> attribute4_register;
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BitField<20, 4, u64> attribute5_register;
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BitField<24, 4, u64> attribute6_register;
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BitField<28, 4, u64> attribute7_register;
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BitField<32, 4, u64> attribute8_register;
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BitField<36, 4, u64> attribute9_register;
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BitField<40, 4, u64> attribute10_register;
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BitField<44, 4, u64> attribute11_register;
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BitField<48, 4, u64> attribute12_register;
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BitField<52, 4, u64> attribute13_register;
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BitField<56, 4, u64> attribute14_register;
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BitField<60, 4, u64> attribute15_register;
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/// Maps input attributes to registers. 4-bits per attribute, specifying a register index
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u32 input_attribute_to_register_map_low;
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u32 input_attribute_to_register_map_high;
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int GetRegisterForAttribute(int attribute_index) const {
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u64 fields[] = {
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attribute0_register, attribute1_register, attribute2_register,
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attribute3_register, attribute4_register, attribute5_register,
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attribute6_register, attribute7_register, attribute8_register,
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attribute9_register, attribute10_register, attribute11_register,
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attribute12_register, attribute13_register, attribute14_register,
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attribute15_register,
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};
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return (int)fields[attribute_index];
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}
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} input_register_map;
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unsigned int GetRegisterForAttribute(unsigned int attribute_index) const {
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u64 map = ((u64)input_attribute_to_register_map_high << 32) |
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(u64)input_attribute_to_register_map_low;
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return (map >> (attribute_index * 4)) & 0b1111;
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}
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BitField<0, 16, u32> output_mask;
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|
@ -23,7 +23,7 @@ struct State {
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Shader::ShaderSetup vs;
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Shader::ShaderSetup gs;
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std::array<Math::Vec4<float24>, 16> vs_default_attributes;
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Shader::AttributeBuffer input_default_attributes;
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struct {
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union LutEntry {
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@ -66,7 +66,7 @@ struct State {
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/// Struct used to describe immediate mode rendering state
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struct ImmediateModeState {
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// Used to buffer partial vertices for immediate-mode rendering.
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Shader::InputVertex input_vertex;
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Shader::AttributeBuffer input_vertex;
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// Index of the next attribute to be loaded into `input_vertex`.
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u32 current_attribute = 0;
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} immediate;
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@ -14,7 +14,7 @@ PrimitiveAssembler<VertexType>::PrimitiveAssembler(Regs::TriangleTopology topolo
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: topology(topology), buffer_index(0) {}
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template <typename VertexType>
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void PrimitiveAssembler<VertexType>::SubmitVertex(VertexType& vtx,
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void PrimitiveAssembler<VertexType>::SubmitVertex(const VertexType& vtx,
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TriangleHandler triangle_handler) {
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switch (topology) {
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// TODO: Figure out what's different with TriangleTopology::Shader.
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|
@ -15,7 +15,8 @@ namespace Pica {
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*/
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template <typename VertexType>
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struct PrimitiveAssembler {
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using TriangleHandler = std::function<void(VertexType& v0, VertexType& v1, VertexType& v2)>;
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using TriangleHandler =
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std::function<void(const VertexType& v0, const VertexType& v1, const VertexType& v2)>;
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PrimitiveAssembler(Regs::TriangleTopology topology = Regs::TriangleTopology::List);
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@ -25,7 +26,7 @@ struct PrimitiveAssembler {
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* NOTE: We could specify the triangle handler in the constructor, but this way we can
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* keep event and handler code next to each other.
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*/
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void SubmitVertex(VertexType& vtx, TriangleHandler triangle_handler);
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void SubmitVertex(const VertexType& vtx, TriangleHandler triangle_handler);
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/**
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* Resets the internal state of the PrimitiveAssembler.
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|
@ -308,8 +308,8 @@ MICROPROFILE_DEFINE(GPU_Rasterization, "GPU", "Rasterization", MP_RGB(50, 50, 24
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* Helper function for ProcessTriangle with the "reversed" flag to allow for implementing
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* culling via recursion.
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*/
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static void ProcessTriangleInternal(const Shader::OutputVertex& v0, const Shader::OutputVertex& v1,
|
||||
const Shader::OutputVertex& v2, bool reversed = false) {
|
||||
static void ProcessTriangleInternal(const Vertex& v0, const Vertex& v1, const Vertex& v2,
|
||||
bool reversed = false) {
|
||||
const auto& regs = g_state.regs;
|
||||
MICROPROFILE_SCOPE(GPU_Rasterization);
|
||||
|
||||
@ -1277,8 +1277,7 @@ static void ProcessTriangleInternal(const Shader::OutputVertex& v0, const Shader
|
||||
}
|
||||
}
|
||||
|
||||
void ProcessTriangle(const Shader::OutputVertex& v0, const Shader::OutputVertex& v1,
|
||||
const Shader::OutputVertex& v2) {
|
||||
void ProcessTriangle(const Vertex& v0, const Vertex& v1, const Vertex& v2) {
|
||||
ProcessTriangleInternal(v0, v1, v2);
|
||||
}
|
||||
|
||||
|
@ -4,16 +4,44 @@
|
||||
|
||||
#pragma once
|
||||
|
||||
namespace Pica {
|
||||
#include "video_core/shader/shader.h"
|
||||
|
||||
namespace Shader {
|
||||
struct OutputVertex;
|
||||
}
|
||||
namespace Pica {
|
||||
|
||||
namespace Rasterizer {
|
||||
|
||||
void ProcessTriangle(const Shader::OutputVertex& v0, const Shader::OutputVertex& v1,
|
||||
const Shader::OutputVertex& v2);
|
||||
struct Vertex : Shader::OutputVertex {
|
||||
Vertex(const OutputVertex& v) : OutputVertex(v) {}
|
||||
|
||||
// Attributes used to store intermediate results
|
||||
// position after perspective divide
|
||||
Math::Vec3<float24> screenpos;
|
||||
|
||||
// Linear interpolation
|
||||
// factor: 0=this, 1=vtx
|
||||
void Lerp(float24 factor, const Vertex& vtx) {
|
||||
pos = pos * factor + vtx.pos * (float24::FromFloat32(1) - factor);
|
||||
|
||||
// TODO: Should perform perspective correct interpolation here...
|
||||
tc0 = tc0 * factor + vtx.tc0 * (float24::FromFloat32(1) - factor);
|
||||
tc1 = tc1 * factor + vtx.tc1 * (float24::FromFloat32(1) - factor);
|
||||
tc2 = tc2 * factor + vtx.tc2 * (float24::FromFloat32(1) - factor);
|
||||
|
||||
screenpos = screenpos * factor + vtx.screenpos * (float24::FromFloat32(1) - factor);
|
||||
|
||||
color = color * factor + vtx.color * (float24::FromFloat32(1) - factor);
|
||||
}
|
||||
|
||||
// Linear interpolation
|
||||
// factor: 0=v0, 1=v1
|
||||
static Vertex Lerp(float24 factor, const Vertex& v0, const Vertex& v1) {
|
||||
Vertex ret = v0;
|
||||
ret.Lerp(factor, v1);
|
||||
return ret;
|
||||
}
|
||||
};
|
||||
|
||||
void ProcessTriangle(const Vertex& v0, const Vertex& v1, const Vertex& v2);
|
||||
|
||||
} // namespace Rasterizer
|
||||
|
||||
|
@ -467,7 +467,7 @@ void RasterizerOpenGL::NotifyPicaRegisterChanged(u32 id) {
|
||||
|
||||
// Fragment lighting switches
|
||||
case PICA_REG_INDEX(lighting.disable):
|
||||
case PICA_REG_INDEX(lighting.num_lights):
|
||||
case PICA_REG_INDEX(lighting.max_light_index):
|
||||
case PICA_REG_INDEX(lighting.config0):
|
||||
case PICA_REG_INDEX(lighting.config1):
|
||||
case PICA_REG_INDEX(lighting.abs_lut_input):
|
||||
|
@ -84,7 +84,7 @@ union PicaShaderConfig {
|
||||
// Fragment lighting
|
||||
|
||||
state.lighting.enable = !regs.lighting.disable;
|
||||
state.lighting.src_num = regs.lighting.num_lights + 1;
|
||||
state.lighting.src_num = regs.lighting.max_light_index + 1;
|
||||
|
||||
for (unsigned light_index = 0; light_index < state.lighting.src_num; ++light_index) {
|
||||
unsigned num = regs.lighting.light_enable.GetNum(light_index);
|
||||
|
@ -4,6 +4,7 @@
|
||||
|
||||
#include <cmath>
|
||||
#include <cstring>
|
||||
#include "common/bit_set.h"
|
||||
#include "common/logging/log.h"
|
||||
#include "common/microprofile.h"
|
||||
#include "video_core/pica.h"
|
||||
@ -19,38 +20,32 @@ namespace Pica {
|
||||
|
||||
namespace Shader {
|
||||
|
||||
OutputVertex OutputVertex::FromRegisters(Math::Vec4<float24> output_regs[16], const Regs& regs,
|
||||
u32 output_mask) {
|
||||
OutputVertex OutputVertex::FromAttributeBuffer(const Regs& regs, AttributeBuffer& input) {
|
||||
// Setup output data
|
||||
OutputVertex ret;
|
||||
// TODO(neobrain): Under some circumstances, up to 16 attributes may be output. We need to
|
||||
// figure out what those circumstances are and enable the remaining outputs then.
|
||||
unsigned index = 0;
|
||||
for (unsigned i = 0; i < 7; ++i) {
|
||||
union {
|
||||
OutputVertex ret{};
|
||||
std::array<float24, 24> vertex_slots;
|
||||
};
|
||||
static_assert(sizeof(vertex_slots) == sizeof(ret), "Struct and array have different sizes.");
|
||||
|
||||
if (index >= regs.vs_output_total)
|
||||
break;
|
||||
unsigned int num_attributes = regs.vs_output_total;
|
||||
ASSERT(num_attributes <= 7);
|
||||
for (unsigned int i = 0; i < num_attributes; ++i) {
|
||||
const auto& output_register_map = regs.vs_output_attributes[i];
|
||||
|
||||
if ((output_mask & (1 << i)) == 0)
|
||||
continue;
|
||||
|
||||
const auto& output_register_map = regs.vs_output_attributes[index];
|
||||
|
||||
u32 semantics[4] = {output_register_map.map_x, output_register_map.map_y,
|
||||
output_register_map.map_z, output_register_map.map_w};
|
||||
Regs::VSOutputAttributes::Semantic semantics[4] = {
|
||||
output_register_map.map_x, output_register_map.map_y, output_register_map.map_z,
|
||||
output_register_map.map_w};
|
||||
|
||||
for (unsigned comp = 0; comp < 4; ++comp) {
|
||||
float24* out = ((float24*)&ret) + semantics[comp];
|
||||
if (semantics[comp] != Regs::VSOutputAttributes::INVALID) {
|
||||
*out = output_regs[i][comp];
|
||||
} else {
|
||||
// Zero output so that attributes which aren't output won't have denormals in them,
|
||||
// which would slow us down later.
|
||||
memset(out, 0, sizeof(*out));
|
||||
Regs::VSOutputAttributes::Semantic semantic = semantics[comp];
|
||||
float24* out = &vertex_slots[semantic];
|
||||
if (semantic < vertex_slots.size()) {
|
||||
*out = input.attr[i][comp];
|
||||
} else if (semantic != Regs::VSOutputAttributes::INVALID) {
|
||||
LOG_ERROR(HW_GPU, "Invalid/unknown semantic id: %u", (unsigned int)semantic);
|
||||
}
|
||||
}
|
||||
|
||||
index++;
|
||||
}
|
||||
|
||||
// The hardware takes the absolute and saturates vertex colors like this, *before* doing
|
||||
@ -71,12 +66,20 @@ OutputVertex OutputVertex::FromRegisters(Math::Vec4<float24> output_regs[16], co
|
||||
return ret;
|
||||
}
|
||||
|
||||
void UnitState::LoadInputVertex(const InputVertex& input, int num_attributes) {
|
||||
// Setup input register table
|
||||
const auto& attribute_register_map = g_state.regs.vs.input_register_map;
|
||||
void UnitState::LoadInput(const Regs::ShaderConfig& config, const AttributeBuffer& input) {
|
||||
const unsigned max_attribute = config.max_input_attribute_index;
|
||||
|
||||
for (int i = 0; i < num_attributes; i++)
|
||||
registers.input[attribute_register_map.GetRegisterForAttribute(i)] = input.attr[i];
|
||||
for (unsigned attr = 0; attr <= max_attribute; ++attr) {
|
||||
unsigned reg = config.GetRegisterForAttribute(attr);
|
||||
registers.input[reg] = input.attr[attr];
|
||||
}
|
||||
}
|
||||
|
||||
void UnitState::WriteOutput(const Regs::ShaderConfig& config, AttributeBuffer& output) {
|
||||
unsigned int output_i = 0;
|
||||
for (unsigned int reg : Common::BitSet<u32>(config.output_mask)) {
|
||||
output.attr[output_i++] = registers.output[reg];
|
||||
}
|
||||
}
|
||||
|
||||
MICROPROFILE_DEFINE(GPU_Shader, "GPU", "Shader", MP_RGB(50, 50, 240));
|
||||
|
@ -23,14 +23,11 @@ namespace Pica {
|
||||
|
||||
namespace Shader {
|
||||
|
||||
struct InputVertex {
|
||||
struct AttributeBuffer {
|
||||
alignas(16) Math::Vec4<float24> attr[16];
|
||||
};
|
||||
|
||||
struct OutputVertex {
|
||||
OutputVertex() = default;
|
||||
|
||||
// VS output attributes
|
||||
Math::Vec4<float24> pos;
|
||||
Math::Vec4<float24> quat;
|
||||
Math::Vec4<float24> color;
|
||||
@ -42,43 +39,22 @@ struct OutputVertex {
|
||||
INSERT_PADDING_WORDS(1);
|
||||
Math::Vec2<float24> tc2;
|
||||
|
||||
// Padding for optimal alignment
|
||||
INSERT_PADDING_WORDS(4);
|
||||
|
||||
// Attributes used to store intermediate results
|
||||
|
||||
// position after perspective divide
|
||||
Math::Vec3<float24> screenpos;
|
||||
INSERT_PADDING_WORDS(1);
|
||||
|
||||
// Linear interpolation
|
||||
// factor: 0=this, 1=vtx
|
||||
void Lerp(float24 factor, const OutputVertex& vtx) {
|
||||
pos = pos * factor + vtx.pos * (float24::FromFloat32(1) - factor);
|
||||
|
||||
// TODO: Should perform perspective correct interpolation here...
|
||||
tc0 = tc0 * factor + vtx.tc0 * (float24::FromFloat32(1) - factor);
|
||||
tc1 = tc1 * factor + vtx.tc1 * (float24::FromFloat32(1) - factor);
|
||||
tc2 = tc2 * factor + vtx.tc2 * (float24::FromFloat32(1) - factor);
|
||||
|
||||
screenpos = screenpos * factor + vtx.screenpos * (float24::FromFloat32(1) - factor);
|
||||
|
||||
color = color * factor + vtx.color * (float24::FromFloat32(1) - factor);
|
||||
}
|
||||
|
||||
// Linear interpolation
|
||||
// factor: 0=v0, 1=v1
|
||||
static OutputVertex Lerp(float24 factor, const OutputVertex& v0, const OutputVertex& v1) {
|
||||
OutputVertex ret = v0;
|
||||
ret.Lerp(factor, v1);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static OutputVertex FromRegisters(Math::Vec4<float24> output_regs[16], const Regs& regs,
|
||||
u32 output_mask);
|
||||
static OutputVertex FromAttributeBuffer(const Regs& regs, AttributeBuffer& output);
|
||||
};
|
||||
#define ASSERT_POS(var, pos) \
|
||||
static_assert(offsetof(OutputVertex, var) == pos * sizeof(float24), "Semantic at wrong " \
|
||||
"offset.")
|
||||
ASSERT_POS(pos, Regs::VSOutputAttributes::POSITION_X);
|
||||
ASSERT_POS(quat, Regs::VSOutputAttributes::QUATERNION_X);
|
||||
ASSERT_POS(color, Regs::VSOutputAttributes::COLOR_R);
|
||||
ASSERT_POS(tc0, Regs::VSOutputAttributes::TEXCOORD0_U);
|
||||
ASSERT_POS(tc1, Regs::VSOutputAttributes::TEXCOORD1_U);
|
||||
ASSERT_POS(tc0_w, Regs::VSOutputAttributes::TEXCOORD0_W);
|
||||
ASSERT_POS(view, Regs::VSOutputAttributes::VIEW_X);
|
||||
ASSERT_POS(tc2, Regs::VSOutputAttributes::TEXCOORD2_U);
|
||||
#undef ASSERT_POS
|
||||
static_assert(std::is_pod<OutputVertex>::value, "Structure is not POD");
|
||||
static_assert(sizeof(OutputVertex) == 32 * sizeof(float), "OutputVertex has invalid size");
|
||||
static_assert(sizeof(OutputVertex) == 24 * sizeof(float), "OutputVertex has invalid size");
|
||||
|
||||
/**
|
||||
* This structure contains the state information that needs to be unique for a shader unit. The 3DS
|
||||
@ -137,10 +113,12 @@ struct UnitState {
|
||||
/**
|
||||
* Loads the unit state with an input vertex.
|
||||
*
|
||||
* @param input Input vertex into the shader
|
||||
* @param num_attributes The number of vertex shader attributes to load
|
||||
* @param config Shader configuration registers corresponding to the unit.
|
||||
* @param input Attribute buffer to load into the input registers.
|
||||
*/
|
||||
void LoadInputVertex(const InputVertex& input, int num_attributes);
|
||||
void LoadInput(const Regs::ShaderConfig& config, const AttributeBuffer& input);
|
||||
|
||||
void WriteOutput(const Regs::ShaderConfig& config, AttributeBuffer& output);
|
||||
};
|
||||
|
||||
struct ShaderSetup {
|
||||
|
@ -668,14 +668,14 @@ void InterpreterEngine::Run(const ShaderSetup& setup, UnitState& state) const {
|
||||
}
|
||||
|
||||
DebugData<true> InterpreterEngine::ProduceDebugInfo(const ShaderSetup& setup,
|
||||
const InputVertex& input,
|
||||
int num_attributes) const {
|
||||
const AttributeBuffer& input,
|
||||
const Regs::ShaderConfig& config) const {
|
||||
UnitState state;
|
||||
DebugData<true> debug_data;
|
||||
|
||||
// Setup input register table
|
||||
boost::fill(state.registers.input, Math::Vec4<float24>::AssignToAll(float24::Zero()));
|
||||
state.LoadInputVertex(input, num_attributes);
|
||||
state.LoadInput(config, input);
|
||||
RunInterpreter(setup, state, debug_data, setup.engine_data.entry_point);
|
||||
return debug_data;
|
||||
}
|
||||
|
@ -19,12 +19,11 @@ public:
|
||||
/**
|
||||
* Produce debug information based on the given shader and input vertex
|
||||
* @param input Input vertex into the shader
|
||||
* @param num_attributes The number of vertex shader attributes
|
||||
* @param config Configuration object for the shader pipeline
|
||||
* @return Debug information for this shader with regards to the given vertex
|
||||
*/
|
||||
DebugData<true> ProduceDebugInfo(const ShaderSetup& setup, const InputVertex& input,
|
||||
int num_attributes) const;
|
||||
DebugData<true> ProduceDebugInfo(const ShaderSetup& setup, const AttributeBuffer& input,
|
||||
const Regs::ShaderConfig& config) const;
|
||||
};
|
||||
|
||||
} // namespace
|
||||
|
@ -70,7 +70,8 @@ void VertexLoader::Setup(const Pica::Regs& regs) {
|
||||
is_setup = true;
|
||||
}
|
||||
|
||||
void VertexLoader::LoadVertex(u32 base_address, int index, int vertex, Shader::InputVertex& input,
|
||||
void VertexLoader::LoadVertex(u32 base_address, int index, int vertex,
|
||||
Shader::AttributeBuffer& input,
|
||||
DebugUtils::MemoryAccessTracker& memory_accesses) {
|
||||
ASSERT_MSG(is_setup, "A VertexLoader needs to be setup before loading vertices.");
|
||||
|
||||
@ -142,7 +143,7 @@ void VertexLoader::LoadVertex(u32 base_address, int index, int vertex, Shader::I
|
||||
input.attr[i][2].ToFloat32(), input.attr[i][3].ToFloat32());
|
||||
} else if (vertex_attribute_is_default[i]) {
|
||||
// Load the default attribute if we're configured to do so
|
||||
input.attr[i] = g_state.vs_default_attributes[i];
|
||||
input.attr[i] = g_state.input_default_attributes.attr[i];
|
||||
LOG_TRACE(HW_GPU,
|
||||
"Loaded default attribute %x for vertex %x (index %x): (%f, %f, %f, %f)", i,
|
||||
vertex, index, input.attr[i][0].ToFloat32(), input.attr[i][1].ToFloat32(),
|
||||
|
@ -11,7 +11,7 @@ class MemoryAccessTracker;
|
||||
}
|
||||
|
||||
namespace Shader {
|
||||
struct InputVertex;
|
||||
struct AttributeBuffer;
|
||||
}
|
||||
|
||||
class VertexLoader {
|
||||
@ -22,7 +22,7 @@ public:
|
||||
}
|
||||
|
||||
void Setup(const Pica::Regs& regs);
|
||||
void LoadVertex(u32 base_address, int index, int vertex, Shader::InputVertex& input,
|
||||
void LoadVertex(u32 base_address, int index, int vertex, Shader::AttributeBuffer& input,
|
||||
DebugUtils::MemoryAccessTracker& memory_accesses);
|
||||
|
||||
int GetNumTotalAttributes() const {
|
||||
|
Loading…
Reference in New Issue
Block a user