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https://github.com/yuzu-emu/yuzu.git
synced 2024-08-22 03:23:23 +02:00
added simple GSP GPU ReadHWRegs function to support returning the framebuffer address
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a272803dcb
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@ -5,14 +5,50 @@
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#include "common/log.h"
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#include "common/log.h"
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#include "core/mem_map.h"
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#include "core/hle/hle.h"
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#include "core/hle/hle.h"
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#include "core/hle/service/gsp.h"
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#include "core/hle/service/gsp.h"
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#include "core/hw/lcd.h"
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////////////////////////////////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////////////////////////////////
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// Namespace GSP_GPU
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// Namespace GSP_GPU
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namespace GSP_GPU {
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namespace GSP_GPU {
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enum {
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REG_FRAMEBUFFER_1 = 0x00400468,
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REG_FRAMEBUFFER_2 = 0x00400494,
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};
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/// Read a GSP GPU hardware register
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void ReadHWRegs(Service::Interface* self) {
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static const u32 framebuffer_1[] = {LCD::VRAM_TOP_LEFT_FRAME1, LCD::VRAM_TOP_RIGHT_FRAME1};
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static const u32 framebuffer_2[] = {LCD::VRAM_TOP_LEFT_FRAME2, LCD::VRAM_TOP_RIGHT_FRAME2};
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u32* cmd_buff = (u32*)HLE::GetPointer(HLE::CMD_BUFFER_ADDR + Service::kCommandHeaderOffset);
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u32 reg_addr = cmd_buff[1];
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u32 size = cmd_buff[2];
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u32* dst = (u32*)Memory::GetPointer(cmd_buff[0x41]);
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switch (reg_addr) {
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// Top framebuffer 1 addresses
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case REG_FRAMEBUFFER_1:
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memcpy(dst, framebuffer_1, size);
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break;
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// Top framebuffer 2 addresses
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case REG_FRAMEBUFFER_2:
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memcpy(dst, framebuffer_1, size);
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break;
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default:
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ERROR_LOG(OSHLE, "GSP_GPU::ReadHWRegs unknown register read at address %08X", reg_addr);
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}
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}
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void RegisterInterruptRelayQueue(Service::Interface* self) {
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void RegisterInterruptRelayQueue(Service::Interface* self) {
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u32* cmd_buff = (u32*)HLE::GetPointer(HLE::CMD_BUFFER_ADDR + Service::kCommandHeaderOffset);
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u32* cmd_buff = (u32*)HLE::GetPointer(HLE::CMD_BUFFER_ADDR + Service::kCommandHeaderOffset);
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u32 flags = cmd_buff[1];
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u32 flags = cmd_buff[1];
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@ -26,7 +62,7 @@ const Interface::FunctionInfo FunctionTable[] = {
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{0x00010082, NULL, "WriteHWRegs"},
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{0x00010082, NULL, "WriteHWRegs"},
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{0x00020084, NULL, "WriteHWRegsWithMask"},
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{0x00020084, NULL, "WriteHWRegsWithMask"},
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{0x00030082, NULL, "WriteHWRegRepeat"},
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{0x00030082, NULL, "WriteHWRegRepeat"},
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{0x00040080, NULL, "ReadHWRegs"},
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{0x00040080, ReadHWRegs, "ReadHWRegs"},
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{0x00050200, NULL, "SetBufferSwap"},
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{0x00050200, NULL, "SetBufferSwap"},
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{0x00060082, NULL, "SetCommandList"},
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{0x00060082, NULL, "SetCommandList"},
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{0x000700C2, NULL, "RequestDma"},
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{0x000700C2, NULL, "RequestDma"},
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