mirror of
https://github.com/yuzu-emu/yuzu.git
synced 2024-08-20 14:43:23 +02:00
Merge pull request #3601 from ReinUsesLisp/some-shader-encodings
video_core/shader: Add some instruction and S2R encodings
This commit is contained in:
commit
b96fd0bd0e
@ -1712,6 +1712,7 @@ public:
|
|||||||
BRK,
|
BRK,
|
||||||
DEPBAR,
|
DEPBAR,
|
||||||
VOTE,
|
VOTE,
|
||||||
|
VOTE_VTG,
|
||||||
SHFL,
|
SHFL,
|
||||||
FSWZADD,
|
FSWZADD,
|
||||||
BFE_C,
|
BFE_C,
|
||||||
@ -1758,6 +1759,7 @@ public:
|
|||||||
IPA,
|
IPA,
|
||||||
OUT_R, // Emit vertex/primitive
|
OUT_R, // Emit vertex/primitive
|
||||||
ISBERD,
|
ISBERD,
|
||||||
|
BAR,
|
||||||
MEMBAR,
|
MEMBAR,
|
||||||
VMAD,
|
VMAD,
|
||||||
VSETP,
|
VSETP,
|
||||||
@ -1842,7 +1844,7 @@ public:
|
|||||||
MOV_C,
|
MOV_C,
|
||||||
MOV_R,
|
MOV_R,
|
||||||
MOV_IMM,
|
MOV_IMM,
|
||||||
MOV_SYS,
|
S2R,
|
||||||
MOV32_IMM,
|
MOV32_IMM,
|
||||||
SHL_C,
|
SHL_C,
|
||||||
SHL_R,
|
SHL_R,
|
||||||
@ -2026,6 +2028,7 @@ private:
|
|||||||
INST("111000110000----", Id::EXIT, Type::Flow, "EXIT"),
|
INST("111000110000----", Id::EXIT, Type::Flow, "EXIT"),
|
||||||
INST("1111000011110---", Id::DEPBAR, Type::Synch, "DEPBAR"),
|
INST("1111000011110---", Id::DEPBAR, Type::Synch, "DEPBAR"),
|
||||||
INST("0101000011011---", Id::VOTE, Type::Warp, "VOTE"),
|
INST("0101000011011---", Id::VOTE, Type::Warp, "VOTE"),
|
||||||
|
INST("0101000011100---", Id::VOTE_VTG, Type::Warp, "VOTE_VTG"),
|
||||||
INST("1110111100010---", Id::SHFL, Type::Warp, "SHFL"),
|
INST("1110111100010---", Id::SHFL, Type::Warp, "SHFL"),
|
||||||
INST("0101000011111---", Id::FSWZADD, Type::Warp, "FSWZADD"),
|
INST("0101000011111---", Id::FSWZADD, Type::Warp, "FSWZADD"),
|
||||||
INST("1110111111011---", Id::LD_A, Type::Memory, "LD_A"),
|
INST("1110111111011---", Id::LD_A, Type::Memory, "LD_A"),
|
||||||
@ -2063,6 +2066,7 @@ private:
|
|||||||
INST("11100000--------", Id::IPA, Type::Trivial, "IPA"),
|
INST("11100000--------", Id::IPA, Type::Trivial, "IPA"),
|
||||||
INST("1111101111100---", Id::OUT_R, Type::Trivial, "OUT_R"),
|
INST("1111101111100---", Id::OUT_R, Type::Trivial, "OUT_R"),
|
||||||
INST("1110111111010---", Id::ISBERD, Type::Trivial, "ISBERD"),
|
INST("1110111111010---", Id::ISBERD, Type::Trivial, "ISBERD"),
|
||||||
|
INST("1111000010101---", Id::BAR, Type::Trivial, "BAR"),
|
||||||
INST("1110111110011---", Id::MEMBAR, Type::Trivial, "MEMBAR"),
|
INST("1110111110011---", Id::MEMBAR, Type::Trivial, "MEMBAR"),
|
||||||
INST("01011111--------", Id::VMAD, Type::Video, "VMAD"),
|
INST("01011111--------", Id::VMAD, Type::Video, "VMAD"),
|
||||||
INST("0101000011110---", Id::VSETP, Type::Video, "VSETP"),
|
INST("0101000011110---", Id::VSETP, Type::Video, "VSETP"),
|
||||||
@ -2134,7 +2138,7 @@ private:
|
|||||||
INST("0100110010011---", Id::MOV_C, Type::Arithmetic, "MOV_C"),
|
INST("0100110010011---", Id::MOV_C, Type::Arithmetic, "MOV_C"),
|
||||||
INST("0101110010011---", Id::MOV_R, Type::Arithmetic, "MOV_R"),
|
INST("0101110010011---", Id::MOV_R, Type::Arithmetic, "MOV_R"),
|
||||||
INST("0011100-10011---", Id::MOV_IMM, Type::Arithmetic, "MOV_IMM"),
|
INST("0011100-10011---", Id::MOV_IMM, Type::Arithmetic, "MOV_IMM"),
|
||||||
INST("1111000011001---", Id::MOV_SYS, Type::Trivial, "MOV_SYS"),
|
INST("1111000011001---", Id::S2R, Type::Trivial, "S2R"),
|
||||||
INST("000000010000----", Id::MOV32_IMM, Type::ArithmeticImmediate, "MOV32_IMM"),
|
INST("000000010000----", Id::MOV32_IMM, Type::ArithmeticImmediate, "MOV32_IMM"),
|
||||||
INST("0100110001100---", Id::FMNMX_C, Type::Arithmetic, "FMNMX_C"),
|
INST("0100110001100---", Id::FMNMX_C, Type::Arithmetic, "FMNMX_C"),
|
||||||
INST("0101110001100---", Id::FMNMX_R, Type::Arithmetic, "FMNMX_R"),
|
INST("0101110001100---", Id::FMNMX_R, Type::Arithmetic, "FMNMX_R"),
|
||||||
|
@ -71,18 +71,24 @@ u32 ShaderIR::DecodeOther(NodeBlock& bb, u32 pc) {
|
|||||||
bb.push_back(Operation(OperationCode::Discard));
|
bb.push_back(Operation(OperationCode::Discard));
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
case OpCode::Id::MOV_SYS: {
|
case OpCode::Id::S2R: {
|
||||||
const Node value = [this, instr] {
|
const Node value = [this, instr] {
|
||||||
switch (instr.sys20) {
|
switch (instr.sys20) {
|
||||||
case SystemVariable::LaneId:
|
case SystemVariable::LaneId:
|
||||||
LOG_WARNING(HW_GPU, "MOV_SYS instruction with LaneId is incomplete");
|
LOG_WARNING(HW_GPU, "S2R instruction with LaneId is incomplete");
|
||||||
return Immediate(0U);
|
return Immediate(0U);
|
||||||
case SystemVariable::InvocationId:
|
case SystemVariable::InvocationId:
|
||||||
return Operation(OperationCode::InvocationId);
|
return Operation(OperationCode::InvocationId);
|
||||||
case SystemVariable::Ydirection:
|
case SystemVariable::Ydirection:
|
||||||
return Operation(OperationCode::YNegate);
|
return Operation(OperationCode::YNegate);
|
||||||
case SystemVariable::InvocationInfo:
|
case SystemVariable::InvocationInfo:
|
||||||
LOG_WARNING(HW_GPU, "MOV_SYS instruction with InvocationInfo is incomplete");
|
LOG_WARNING(HW_GPU, "S2R instruction with InvocationInfo is incomplete");
|
||||||
|
return Immediate(0U);
|
||||||
|
case SystemVariable::WscaleFactorXY:
|
||||||
|
UNIMPLEMENTED_MSG("S2R WscaleFactorXY is not implemented");
|
||||||
|
return Immediate(0U);
|
||||||
|
case SystemVariable::WscaleFactorZ:
|
||||||
|
UNIMPLEMENTED_MSG("S2R WscaleFactorZ is not implemented");
|
||||||
return Immediate(0U);
|
return Immediate(0U);
|
||||||
case SystemVariable::Tid: {
|
case SystemVariable::Tid: {
|
||||||
Node value = Immediate(0);
|
Node value = Immediate(0);
|
||||||
|
@ -359,6 +359,9 @@ Node ShaderIR::GetConditionCode(Tegra::Shader::ConditionCode cc) const {
|
|||||||
switch (cc) {
|
switch (cc) {
|
||||||
case Tegra::Shader::ConditionCode::NEU:
|
case Tegra::Shader::ConditionCode::NEU:
|
||||||
return GetInternalFlag(InternalFlag::Zero, true);
|
return GetInternalFlag(InternalFlag::Zero, true);
|
||||||
|
case Tegra::Shader::ConditionCode::FCSM_TR:
|
||||||
|
UNIMPLEMENTED_MSG("EXIT.FCSM_TR is not implemented");
|
||||||
|
return MakeNode<PredicateNode>(Pred::NeverExecute, false);
|
||||||
default:
|
default:
|
||||||
UNIMPLEMENTED_MSG("Unimplemented condition code: {}", static_cast<u32>(cc));
|
UNIMPLEMENTED_MSG("Unimplemented condition code: {}", static_cast<u32>(cc));
|
||||||
return MakeNode<PredicateNode>(Pred::NeverExecute, false);
|
return MakeNode<PredicateNode>(Pred::NeverExecute, false);
|
||||||
|
Loading…
Reference in New Issue
Block a user