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OpenGL: Split buffer-write mask sync into seperate functions
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fa24df7340
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c6bbc41984
@ -153,6 +153,9 @@ void RasterizerOpenGL::Reset() {
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SyncLogicOp();
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SyncStencilTest();
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SyncDepthTest();
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SyncColorWriteMask();
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SyncStencilWriteMask();
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SyncDepthWriteMask();
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SetShader();
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@ -268,16 +271,23 @@ void RasterizerOpenGL::NotifyPicaRegisterChanged(u32 id) {
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state.draw.shader_dirty = true;
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break;
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// Stencil test
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// Sync GL stencil test + stencil write mask
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// (Pica stencil test function register also contains a stencil write mask)
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case PICA_REG_INDEX(output_merger.stencil_test.raw_func):
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SyncStencilTest();
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SyncStencilWriteMask();
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break;
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case PICA_REG_INDEX(output_merger.stencil_test.raw_op):
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case PICA_REG_INDEX(framebuffer.depth_format):
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SyncStencilTest();
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break;
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// Depth test
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// Sync GL depth test + depth and color write mask
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// (Pica depth test function register also contains a depth and color write mask)
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case PICA_REG_INDEX(output_merger.depth_test_enable):
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SyncDepthTest();
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SyncDepthWriteMask();
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SyncColorWriteMask();
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break;
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// Logic op
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@ -881,13 +891,30 @@ void RasterizerOpenGL::SyncLogicOp() {
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state.logic_op = PicaToGL::LogicOp(Pica::g_state.regs.output_merger.logic_op);
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}
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void RasterizerOpenGL::SyncColorWriteMask() {
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const auto& regs = Pica::g_state.regs;
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state.color_mask.red_enabled = regs.output_merger.red_enable;
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state.color_mask.green_enabled = regs.output_merger.green_enable;
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state.color_mask.blue_enabled = regs.output_merger.blue_enable;
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state.color_mask.alpha_enabled = regs.output_merger.alpha_enable;
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}
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void RasterizerOpenGL::SyncStencilWriteMask() {
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const auto& regs = Pica::g_state.regs;
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state.stencil.write_mask = regs.output_merger.stencil_test.write_mask;
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}
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void RasterizerOpenGL::SyncDepthWriteMask() {
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const auto& regs = Pica::g_state.regs;
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state.depth.write_mask = regs.output_merger.depth_write_enable ? GL_TRUE : GL_FALSE;
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}
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void RasterizerOpenGL::SyncStencilTest() {
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const auto& regs = Pica::g_state.regs;
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state.stencil.test_enabled = regs.output_merger.stencil_test.enable && regs.framebuffer.depth_format == Pica::Regs::DepthFormat::D24S8;
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state.stencil.test_func = PicaToGL::CompareFunc(regs.output_merger.stencil_test.func);
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state.stencil.test_ref = regs.output_merger.stencil_test.reference_value;
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state.stencil.test_mask = regs.output_merger.stencil_test.input_mask;
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state.stencil.write_mask = regs.output_merger.stencil_test.write_mask;
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state.stencil.action_stencil_fail = PicaToGL::StencilOp(regs.output_merger.stencil_test.action_stencil_fail);
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state.stencil.action_depth_fail = PicaToGL::StencilOp(regs.output_merger.stencil_test.action_depth_fail);
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state.stencil.action_depth_pass = PicaToGL::StencilOp(regs.output_merger.stencil_test.action_depth_pass);
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@ -899,11 +926,6 @@ void RasterizerOpenGL::SyncDepthTest() {
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regs.output_merger.depth_write_enable == 1;
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state.depth.test_func = regs.output_merger.depth_test_enable == 1 ?
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PicaToGL::CompareFunc(regs.output_merger.depth_test_func) : GL_ALWAYS;
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state.color_mask.red_enabled = regs.output_merger.red_enable;
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state.color_mask.green_enabled = regs.output_merger.green_enable;
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state.color_mask.blue_enabled = regs.output_merger.blue_enable;
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state.color_mask.alpha_enabled = regs.output_merger.alpha_enable;
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state.depth.write_mask = regs.output_merger.depth_write_enable ? GL_TRUE : GL_FALSE;
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}
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void RasterizerOpenGL::SyncCombinerColor() {
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@ -344,6 +344,15 @@ private:
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/// Syncs the logic op states to match the PICA register
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void SyncLogicOp();
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/// Syncs the color write mask to match the PICA register state
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void SyncColorWriteMask();
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/// Syncs the stencil write mask to match the PICA register state
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void SyncStencilWriteMask();
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/// Syncs the depth write mask to match the PICA register state
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void SyncDepthWriteMask();
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/// Syncs the stencil test states to match the PICA register
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void SyncStencilTest();
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