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spirv: Fix implicit lod type
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@ -101,6 +101,10 @@ public:
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return Constant(U32[1], value);
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}
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Id Const(f32 value) {
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return Constant(F32[1], value);
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}
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Id Const(u32 element_1, u32 element_2) {
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return ConstantComposite(U32[2], Const(element_1), Const(element_2));
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}
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@ -320,7 +320,7 @@ Id EmitImageSampleImplicitLod(EmitContext& ctx, IR::Inst* inst, const IR::Value&
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// We can't use implicit lods on non-fragment stages on SPIR-V. Maxwell hardware behaves as
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// if the lod was explicitly zero. This may change on Turing with implicit compute
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// derivatives
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const Id lod{ctx.Const(0)};
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const Id lod{ctx.Const(0.0f)};
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const ImageOperands operands(ctx, false, true, info.has_lod_clamp != 0, lod, offset);
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return Emit(&EmitContext::OpImageSparseSampleExplicitLod,
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&EmitContext::OpImageSampleExplicitLod, ctx, inst, ctx.F32[4],
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