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Merge pull request #1008 from lioncash/pc
dyncom: Handle the case where PC is the source register for STR/VSTM/VLDM
This commit is contained in:
commit
ce65925bc3
@ -5994,7 +5994,12 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
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ldst_inst* inst_cream = (ldst_inst*)inst_base->component;
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inst_cream->get_addr(cpu, inst_cream->inst, addr);
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unsigned int value = cpu->Reg[BITS(inst_cream->inst, 12, 15)];
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unsigned int reg = BITS(inst_cream->inst, 12, 15);
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unsigned int value = cpu->Reg[reg];
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if (reg == 15)
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value += 2 * cpu->GetInstructionSize();
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cpu->WriteMemory32(addr, value);
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}
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cpu->Reg[15] += cpu->GetInstructionSize();
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@ -1511,19 +1511,26 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vstm)(unsigned int inst, int index)
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#ifdef VFP_INTERPRETER_IMPL
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VSTM_INST: /* encoding 1 */
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{
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if ((inst_base->cond == 0xe) || CondPassed(cpu, inst_base->cond)) {
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if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
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CHECK_VFP_ENABLED;
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vstm_inst *inst_cream = (vstm_inst *)inst_base->component;
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vstm_inst* inst_cream = (vstm_inst*)inst_base->component;
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addr = (inst_cream->add ? cpu->Reg[inst_cream->n] : cpu->Reg[inst_cream->n] - inst_cream->imm32);
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u32 address = cpu->Reg[inst_cream->n];
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// Only possible in ARM mode, where PC accesses have an 8 byte offset.
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if (inst_cream->n == 15)
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address += 8;
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if (inst_cream->add == 0)
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address -= inst_cream->imm32;
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for (unsigned int i = 0; i < inst_cream->regs; i++)
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{
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if (inst_cream->single)
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{
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cpu->WriteMemory32(addr, cpu->ExtReg[inst_cream->d+i]);
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addr += 4;
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cpu->WriteMemory32(address, cpu->ExtReg[inst_cream->d+i]);
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address += 4;
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}
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else
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{
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@ -1531,17 +1538,17 @@ VSTM_INST: /* encoding 1 */
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const u32 word2 = cpu->ExtReg[(inst_cream->d+i)*2+1];
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if (cpu->InBigEndianMode()) {
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cpu->WriteMemory32(addr + 0, word2);
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cpu->WriteMemory32(addr + 4, word1);
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cpu->WriteMemory32(address + 0, word2);
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cpu->WriteMemory32(address + 4, word1);
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} else {
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cpu->WriteMemory32(addr + 0, word1);
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cpu->WriteMemory32(addr + 4, word2);
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cpu->WriteMemory32(address + 0, word1);
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cpu->WriteMemory32(address + 4, word2);
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}
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addr += 8;
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address += 8;
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}
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}
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if (inst_cream->wback){
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if (inst_cream->wback) {
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cpu->Reg[inst_cream->n] = (inst_cream->add ? cpu->Reg[inst_cream->n] + inst_cream->imm32 :
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cpu->Reg[inst_cream->n] - inst_cream->imm32);
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}
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@ -1731,24 +1738,31 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vldm)(unsigned int inst, int index)
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#ifdef VFP_INTERPRETER_IMPL
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VLDM_INST:
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{
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if ((inst_base->cond == 0xe) || CondPassed(cpu, inst_base->cond)) {
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if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
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CHECK_VFP_ENABLED;
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vldm_inst *inst_cream = (vldm_inst *)inst_base->component;
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vldm_inst* inst_cream = (vldm_inst*)inst_base->component;
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addr = (inst_cream->add ? cpu->Reg[inst_cream->n] : cpu->Reg[inst_cream->n] - inst_cream->imm32);
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u32 address = cpu->Reg[inst_cream->n];
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// Only possible in ARM mode, where PC accesses have an 8 byte offset.
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if (inst_cream->n == 15)
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address += 8;
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if (inst_cream->add == 0)
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address -= inst_cream->imm32;
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for (unsigned int i = 0; i < inst_cream->regs; i++)
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{
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if (inst_cream->single)
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{
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cpu->ExtReg[inst_cream->d+i] = cpu->ReadMemory32(addr);
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addr += 4;
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cpu->ExtReg[inst_cream->d+i] = cpu->ReadMemory32(address);
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address += 4;
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}
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else
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{
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const u32 word1 = cpu->ReadMemory32(addr + 0);
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const u32 word2 = cpu->ReadMemory32(addr + 4);
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const u32 word1 = cpu->ReadMemory32(address + 0);
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const u32 word2 = cpu->ReadMemory32(address + 4);
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if (cpu->InBigEndianMode()) {
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cpu->ExtReg[(inst_cream->d+i)*2+0] = word2;
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@ -1758,10 +1772,10 @@ VLDM_INST:
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cpu->ExtReg[(inst_cream->d+i)*2+1] = word2;
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}
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addr += 8;
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address += 8;
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}
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}
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if (inst_cream->wback){
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if (inst_cream->wback) {
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cpu->Reg[inst_cream->n] = (inst_cream->add ? cpu->Reg[inst_cream->n] + inst_cream->imm32 :
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cpu->Reg[inst_cream->n] - inst_cream->imm32);
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}
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