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- disable strict alignment on LDRD/STRD
- handle RD in STREX/STREXB
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9db26df05f
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@ -5536,14 +5536,15 @@ Handle_Load_Double (ARMul_State * state, ARMword instr)
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addr = base;
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/* The address must be aligned on a 8 byte boundary. */
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if (addr & 0x7) {
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#ifdef ABORTS
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ARMul_DATAABORT (addr);
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#else
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ARMul_UndefInstr (state, instr);
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#endif
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return;
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}
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// FIX(Normatt): Disable strict alignment on LDRD/STRD
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// if (addr & 0x7) {
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//#ifdef ABORTS
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// ARMul_DATAABORT (addr);
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//#else
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// ARMul_UndefInstr (state, instr);
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//#endif
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// return;
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// }
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/* For pre indexed or post indexed addressing modes,
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check that the destination registers do not overlap
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@ -5640,14 +5641,15 @@ Handle_Store_Double (ARMul_State * state, ARMword instr)
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addr = base;
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/* The address must be aligned on a 8 byte boundary. */
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if (addr & 0x7) {
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#ifdef ABORTS
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ARMul_DATAABORT (addr);
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#else
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ARMul_UndefInstr (state, instr);
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#endif
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return;
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}
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// FIX(Normatt): Disable strict alignment on LDRD/STRD
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// if (addr & 0x7) {
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//#ifdef ABORTS
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// ARMul_DATAABORT (addr);
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//#else
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// ARMul_UndefInstr (state, instr);
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//#endif
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// return;
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// }
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/* For pre indexed or post indexed addressing modes,
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check that the destination registers do not overlap
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@ -6405,6 +6407,8 @@ handle_v6_insn (ARMul_State * state, ARMword instr)
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if (state->Aborted) {
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TAKEABORT;
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}
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// FIX(Normmatt): Handle RD in STREX/STREXB
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state->Reg[DESTReg] = 0; //Always succeed
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return 1;
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}
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@ -6432,7 +6436,8 @@ handle_v6_insn (ARMul_State * state, ARMword instr)
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if (state->Aborted) {
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TAKEABORT;
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}
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// FIX(Normmatt): Handle RD in STREX/STREXB
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state->Reg[DESTReg] = 0; //Always succeed
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//printf("In %s, strexb not implemented\n", __FUNCTION__);
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UNDEF_LSRBPC;
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/* WRITESDEST (dest); */
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