mirror of
https://github.com/yuzu-emu/yuzu.git
synced 2024-08-21 12:43:23 +02:00
spirv: Workaround image unsigned offset bug
Workaround bug on Nvidia's OpenGL SPIR-V compiler when using unsigned texture offsets.
This commit is contained in:
parent
4ead714910
commit
d2e811db2e
@ -122,10 +122,6 @@ public:
|
|||||||
return Constant(U32[1], value);
|
return Constant(U32[1], value);
|
||||||
}
|
}
|
||||||
|
|
||||||
Id Const(f32 value) {
|
|
||||||
return Constant(F32[1], value);
|
|
||||||
}
|
|
||||||
|
|
||||||
Id Const(u32 element_1, u32 element_2) {
|
Id Const(u32 element_1, u32 element_2) {
|
||||||
return ConstantComposite(U32[2], Const(element_1), Const(element_2));
|
return ConstantComposite(U32[2], Const(element_1), Const(element_2));
|
||||||
}
|
}
|
||||||
@ -139,6 +135,27 @@ public:
|
|||||||
Const(element_4));
|
Const(element_4));
|
||||||
}
|
}
|
||||||
|
|
||||||
|
Id SConst(s32 value) {
|
||||||
|
return Constant(S32[1], value);
|
||||||
|
}
|
||||||
|
|
||||||
|
Id SConst(s32 element_1, s32 element_2) {
|
||||||
|
return ConstantComposite(S32[2], SConst(element_1), SConst(element_2));
|
||||||
|
}
|
||||||
|
|
||||||
|
Id SConst(s32 element_1, s32 element_2, s32 element_3) {
|
||||||
|
return ConstantComposite(S32[3], SConst(element_1), SConst(element_2), SConst(element_3));
|
||||||
|
}
|
||||||
|
|
||||||
|
Id SConst(s32 element_1, s32 element_2, s32 element_3, s32 element_4) {
|
||||||
|
return ConstantComposite(S32[4], SConst(element_1), SConst(element_2), SConst(element_3),
|
||||||
|
SConst(element_4));
|
||||||
|
}
|
||||||
|
|
||||||
|
Id Const(f32 value) {
|
||||||
|
return Constant(F32[1], value);
|
||||||
|
}
|
||||||
|
|
||||||
const Profile& profile;
|
const Profile& profile;
|
||||||
Stage stage{};
|
Stage stage{};
|
||||||
|
|
||||||
|
@ -104,7 +104,7 @@ private:
|
|||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
if (offset.IsImmediate()) {
|
if (offset.IsImmediate()) {
|
||||||
Add(spv::ImageOperandsMask::ConstOffset, ctx.Const(offset.U32()));
|
Add(spv::ImageOperandsMask::ConstOffset, ctx.SConst(offset.U32()));
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
IR::Inst* const inst{offset.InstRecursive()};
|
IR::Inst* const inst{offset.InstRecursive()};
|
||||||
@ -112,16 +112,16 @@ private:
|
|||||||
switch (inst->GetOpcode()) {
|
switch (inst->GetOpcode()) {
|
||||||
case IR::Opcode::CompositeConstructU32x2:
|
case IR::Opcode::CompositeConstructU32x2:
|
||||||
Add(spv::ImageOperandsMask::ConstOffset,
|
Add(spv::ImageOperandsMask::ConstOffset,
|
||||||
ctx.Const(inst->Arg(0).U32(), inst->Arg(1).U32()));
|
ctx.SConst(inst->Arg(0).U32(), inst->Arg(1).U32()));
|
||||||
return;
|
return;
|
||||||
case IR::Opcode::CompositeConstructU32x3:
|
case IR::Opcode::CompositeConstructU32x3:
|
||||||
Add(spv::ImageOperandsMask::ConstOffset,
|
Add(spv::ImageOperandsMask::ConstOffset,
|
||||||
ctx.Const(inst->Arg(0).U32(), inst->Arg(1).U32(), inst->Arg(2).U32()));
|
ctx.SConst(inst->Arg(0).U32(), inst->Arg(1).U32(), inst->Arg(2).U32()));
|
||||||
return;
|
return;
|
||||||
case IR::Opcode::CompositeConstructU32x4:
|
case IR::Opcode::CompositeConstructU32x4:
|
||||||
Add(spv::ImageOperandsMask::ConstOffset,
|
Add(spv::ImageOperandsMask::ConstOffset,
|
||||||
ctx.Const(inst->Arg(0).U32(), inst->Arg(1).U32(), inst->Arg(2).U32(),
|
ctx.SConst(inst->Arg(0).U32(), inst->Arg(1).U32(), inst->Arg(2).U32(),
|
||||||
inst->Arg(3).U32()));
|
inst->Arg(3).U32()));
|
||||||
return;
|
return;
|
||||||
default:
|
default:
|
||||||
break;
|
break;
|
||||||
|
Loading…
Reference in New Issue
Block a user