mirror of
https://github.com/yuzu-emu/yuzu.git
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arm_dynarmic: Implement core
This commit is contained in:
parent
056f987bcd
commit
d2fbc78320
10
externals/CMakeLists.txt
vendored
10
externals/CMakeLists.txt
vendored
@ -10,6 +10,14 @@ target_include_directories(catch-single-include INTERFACE catch/single_include)
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# Crypto++
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# Crypto++
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add_subdirectory(cryptopp)
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add_subdirectory(cryptopp)
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# Dynarmic
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if (ARCHITECTURE_x86_64)
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add_library(xbyak INTERFACE)
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set(DYNARMIC_TESTS OFF)
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set(DYNARMIC_NO_BUNDLED_FMT ON)
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add_subdirectory(dynarmic)
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endif()
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# libfmt
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# libfmt
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add_subdirectory(fmt)
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add_subdirectory(fmt)
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@ -49,7 +57,7 @@ target_include_directories(unicorn-headers INTERFACE ./unicorn/include)
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# Xbyak
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# Xbyak
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if (ARCHITECTURE_x86_64)
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if (ARCHITECTURE_x86_64)
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# Defined before "dynarmic" above
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# Defined before "dynarmic" above
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add_library(xbyak INTERFACE)
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# add_library(xbyak INTERFACE)
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target_include_directories(xbyak INTERFACE ./xbyak/xbyak)
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target_include_directories(xbyak INTERFACE ./xbyak/xbyak)
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target_compile_definitions(xbyak INTERFACE XBYAK_NO_OP_NAMES)
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target_compile_definitions(xbyak INTERFACE XBYAK_NO_OP_NAMES)
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endif()
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endif()
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2
externals/dynarmic
vendored
2
externals/dynarmic
vendored
@ -1 +1 @@
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Subproject commit 305fba50babf736d77b71c5a44dd6b0ccb7f9d10
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Subproject commit a5caa7cd8d5741d34dcf0b3447b5f1c3f7333d56
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@ -168,7 +168,7 @@ QString WaitTreeThread::GetText() const {
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}
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}
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QString pc_info = tr(" PC = 0x%1 LR = 0x%2")
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QString pc_info = tr(" PC = 0x%1 LR = 0x%2")
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.arg(thread.context.pc, 8, 16, QLatin1Char('0'))
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.arg(thread.context.pc, 8, 16, QLatin1Char('0'))
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.arg(thread.context.lr, 8, 16, QLatin1Char('0'));
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.arg(thread.context.cpu_registers[31], 8, 16, QLatin1Char('0'));
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return WaitTreeWaitObject::GetText() + pc_info + " (" + status + ") ";
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return WaitTreeWaitObject::GetText() + pc_info + " (" + status + ") ";
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}
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}
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@ -171,7 +171,7 @@ set(HEADERS
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create_directory_groups(${SRCS} ${HEADERS})
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create_directory_groups(${SRCS} ${HEADERS})
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add_library(core STATIC ${SRCS} ${HEADERS})
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add_library(core STATIC ${SRCS} ${HEADERS})
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target_link_libraries(core PUBLIC common PRIVATE audio_core network video_core)
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target_link_libraries(core PUBLIC common PRIVATE audio_core dynarmic network video_core)
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target_link_libraries(core PUBLIC Boost::boost PRIVATE cryptopp fmt lz4_static unicorn)
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target_link_libraries(core PUBLIC Boost::boost PRIVATE cryptopp fmt lz4_static unicorn)
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if (ENABLE_WEB_SERVICE)
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if (ENABLE_WEB_SERVICE)
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target_link_libraries(core PUBLIC json-headers web_service)
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target_link_libraries(core PUBLIC json-headers web_service)
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@ -4,6 +4,7 @@
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#pragma once
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#pragma once
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#include <array>
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#include "common/common_types.h"
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#include "common/common_types.h"
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#include "core/hle/kernel/vm_manager.h"
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#include "core/hle/kernel/vm_manager.h"
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@ -13,15 +14,12 @@ public:
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virtual ~ARM_Interface() {}
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virtual ~ARM_Interface() {}
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struct ThreadContext {
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struct ThreadContext {
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u64 cpu_registers[30];
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std::array<u64, 31> cpu_registers;
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u64 lr;
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u64 sp;
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u64 sp;
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u64 pc;
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u64 pc;
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u64 cpsr;
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u64 cpsr;
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u128 fpu_registers[32];
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std::array<u128, 32> fpu_registers;
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u64 fpscr;
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u64 fpscr;
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u64 fpexc;
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// TODO(bunnei): Fix once we have proper support for tpidrro_el0, etc. in the JIT
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// TODO(bunnei): Fix once we have proper support for tpidrro_el0, etc. in the JIT
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VAddr tls_address;
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VAddr tls_address;
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@ -75,9 +73,9 @@ public:
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*/
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*/
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virtual void SetReg(int index, u64 value) = 0;
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virtual void SetReg(int index, u64 value) = 0;
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virtual const u128& GetExtReg(int index) const = 0;
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virtual u128 GetExtReg(int index) const = 0;
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virtual void SetExtReg(int index, u128& value) = 0;
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virtual void SetExtReg(int index, u128 value) = 0;
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/**
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/**
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* Gets the value of a VFP register
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* Gets the value of a VFP register
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@ -2,43 +2,114 @@
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// Licensed under GPLv2 or any later version
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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// Refer to the license.txt file included.
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#include <memory>
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#include <dynarmic/A64/a64.h>
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#include <dynarmic/A64/config.h>
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#include "core/arm/dynarmic/arm_dynarmic.h"
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#include "core/arm/dynarmic/arm_dynarmic.h"
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#include "core/core_timing.h"
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#include "core/hle/kernel/svc.h"
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#include "core/memory.h"
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ARM_Dynarmic::ARM_Dynarmic() {
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class ARM_Dynarmic_Callbacks : public Dynarmic::A64::UserCallbacks {
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UNIMPLEMENTED();
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public:
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explicit ARM_Dynarmic_Callbacks(ARM_Dynarmic& parent) : parent(parent) {}
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~ARM_Dynarmic_Callbacks() = default;
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virtual u8 MemoryRead8(u64 vaddr) override {
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return Memory::Read8(vaddr);
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}
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virtual u16 MemoryRead16(u64 vaddr) override {
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return Memory::Read16(vaddr);
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}
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virtual u32 MemoryRead32(u64 vaddr) override {
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return Memory::Read32(vaddr);
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}
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virtual u64 MemoryRead64(u64 vaddr) override {
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return Memory::Read64(vaddr);
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}
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virtual void MemoryWrite8(u64 vaddr, u8 value) override {
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Memory::Write8(vaddr, value);
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}
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virtual void MemoryWrite16(u64 vaddr, u16 value) override {
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Memory::Write16(vaddr, value);
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}
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virtual void MemoryWrite32(u64 vaddr, u32 value) override {
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Memory::Write32(vaddr, value);
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}
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virtual void MemoryWrite64(u64 vaddr, u64 value) override {
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Memory::Write64(vaddr, value);
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}
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virtual void InterpreterFallback(u64 pc, size_t num_instructions) override {
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ARM_Interface::ThreadContext ctx;
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parent.SaveContext(ctx);
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parent.inner_unicorn.LoadContext(ctx);
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parent.inner_unicorn.ExecuteInstructions(num_instructions);
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parent.inner_unicorn.SaveContext(ctx);
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parent.LoadContext(ctx);
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num_interpreted_instructions += num_instructions;
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}
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virtual void CallSVC(u32 swi) override {
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printf("svc %x\n", swi);
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Kernel::CallSVC(swi);
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}
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virtual void AddTicks(u64 ticks) override {
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if (ticks > ticks_remaining) {
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ticks_remaining = 0;
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return;
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}
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ticks -= ticks_remaining;
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}
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virtual u64 GetTicksRemaining() override {
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return ticks_remaining;
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}
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ARM_Dynarmic& parent;
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size_t ticks_remaining = 0;
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size_t num_interpreted_instructions = 0;
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u64 tpidrr0_el0 = 0;
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};
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ARM_Dynarmic::ARM_Dynarmic()
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: cb(std::make_unique<ARM_Dynarmic_Callbacks>(*this)),
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jit(Dynarmic::A64::UserConfig{cb.get()}) {
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ARM_Interface::ThreadContext ctx;
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inner_unicorn.SaveContext(ctx);
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LoadContext(ctx);
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}
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}
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void ARM_Dynarmic::MapBackingMemory(VAddr /*address*/, size_t /*size*/, u8* /*memory*/,
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ARM_Dynarmic::~ARM_Dynarmic() = default;
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Kernel::VMAPermission /*perms*/) {
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UNIMPLEMENTED();
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void ARM_Dynarmic::MapBackingMemory(u64 address, size_t size, u8* memory,
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Kernel::VMAPermission perms) {
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inner_unicorn.MapBackingMemory(address, size, memory, perms);
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}
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}
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void ARM_Dynarmic::SetPC(u64 /*pc*/) {
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void ARM_Dynarmic::SetPC(u64 pc) {
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UNIMPLEMENTED();
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jit.SetPC(pc);
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}
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}
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u64 ARM_Dynarmic::GetPC() const {
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u64 ARM_Dynarmic::GetPC() const {
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UNIMPLEMENTED();
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return jit.GetPC();
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return {};
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}
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}
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u64 ARM_Dynarmic::GetReg(int /*index*/) const {
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u64 ARM_Dynarmic::GetReg(int index) const {
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UNIMPLEMENTED();
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return jit.GetRegister(index);
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return {};
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}
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}
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void ARM_Dynarmic::SetReg(int /*index*/, u64 /*value*/) {
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void ARM_Dynarmic::SetReg(int index, u64 value) {
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UNIMPLEMENTED();
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jit.SetRegister(index, value);
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}
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}
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const u128& ARM_Dynarmic::GetExtReg(int /*index*/) const {
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u128 ARM_Dynarmic::GetExtReg(int index) const {
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UNIMPLEMENTED();
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return jit.GetVector(index);
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static constexpr u128 res{};
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return res;
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}
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}
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void ARM_Dynarmic::SetExtReg(int /*index*/, u128& /*value*/) {
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void ARM_Dynarmic::SetExtReg(int index, u128 value) {
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UNIMPLEMENTED();
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jit.SetVector(index, value);
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}
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}
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u32 ARM_Dynarmic::GetVFPReg(int /*index*/) const {
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u32 ARM_Dynarmic::GetVFPReg(int /*index*/) const {
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@ -51,41 +122,56 @@ void ARM_Dynarmic::SetVFPReg(int /*index*/, u32 /*value*/) {
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}
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}
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u32 ARM_Dynarmic::GetCPSR() const {
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u32 ARM_Dynarmic::GetCPSR() const {
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UNIMPLEMENTED();
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return jit.GetPstate();
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return {};
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}
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}
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void ARM_Dynarmic::SetCPSR(u32 /*cpsr*/) {
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void ARM_Dynarmic::SetCPSR(u32 cpsr) {
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UNIMPLEMENTED();
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jit.SetPstate(cpsr);
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}
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}
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VAddr ARM_Dynarmic::GetTlsAddress() const {
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u64 ARM_Dynarmic::GetTlsAddress() const {
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UNIMPLEMENTED();
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return cb->tpidrr0_el0;
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return {};
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}
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}
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void ARM_Dynarmic::SetTlsAddress(VAddr /*address*/) {
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void ARM_Dynarmic::SetTlsAddress(u64 address) {
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UNIMPLEMENTED();
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cb->tpidrr0_el0 = address;
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}
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}
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void ARM_Dynarmic::ExecuteInstructions(int /*num_instructions*/) {
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void ARM_Dynarmic::ExecuteInstructions(int num_instructions) {
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UNIMPLEMENTED();
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cb->ticks_remaining = num_instructions;
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jit.Run();
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CoreTiming::AddTicks(num_instructions - cb->num_interpreted_instructions);
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cb->num_interpreted_instructions = 0;
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}
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}
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void ARM_Dynarmic::SaveContext(ARM_Interface::ThreadContext& /*ctx*/) {
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void ARM_Dynarmic::SaveContext(ARM_Interface::ThreadContext& ctx) {
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UNIMPLEMENTED();
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ctx.cpu_registers = jit.GetRegisters();
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ctx.sp = jit.GetSP();
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ctx.pc = jit.GetPC();
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ctx.cpsr = jit.GetPstate();
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ctx.fpu_registers = jit.GetVectors();
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ctx.fpscr = jit.GetFpcr();
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ctx.tls_address = cb->tpidrr0_el0;
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}
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}
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void ARM_Dynarmic::LoadContext(const ARM_Interface::ThreadContext& /*ctx*/) {
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void ARM_Dynarmic::LoadContext(const ARM_Interface::ThreadContext& ctx) {
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UNIMPLEMENTED();
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jit.SetRegisters(ctx.cpu_registers);
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jit.SetSP(ctx.sp);
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jit.SetPC(ctx.pc);
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jit.SetPstate(ctx.cpsr);
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jit.SetVectors(ctx.fpu_registers);
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jit.SetFpcr(ctx.fpscr);
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cb->tpidrr0_el0 = ctx.tls_address;
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}
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}
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void ARM_Dynarmic::PrepareReschedule() {
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void ARM_Dynarmic::PrepareReschedule() {
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UNIMPLEMENTED();
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if (jit.IsExecuting()) {
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jit.HaltExecution();
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}
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}
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}
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void ARM_Dynarmic::ClearInstructionCache() {
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void ARM_Dynarmic::ClearInstructionCache() {
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UNIMPLEMENTED();
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jit.ClearCache();
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}
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}
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void ARM_Dynarmic::PageTableChanged() {
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void ARM_Dynarmic::PageTableChanged() {
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@ -4,12 +4,18 @@
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#pragma once
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#pragma once
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#include <memory>
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#include <dynarmic/A64/a64.h>
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#include "common/common_types.h"
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#include "common/common_types.h"
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#include "core/arm/arm_interface.h"
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#include "core/arm/arm_interface.h"
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#include "core/arm/unicorn/arm_unicorn.h"
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class ARM_Dynarmic_Callbacks;
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class ARM_Dynarmic final : public ARM_Interface {
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class ARM_Dynarmic final : public ARM_Interface {
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public:
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public:
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ARM_Dynarmic();
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ARM_Dynarmic();
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~ARM_Dynarmic();
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void MapBackingMemory(VAddr address, size_t size, u8* memory,
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void MapBackingMemory(VAddr address, size_t size, u8* memory,
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Kernel::VMAPermission perms) override;
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Kernel::VMAPermission perms) override;
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@ -18,8 +24,8 @@ public:
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u64 GetPC() const override;
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u64 GetPC() const override;
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u64 GetReg(int index) const override;
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u64 GetReg(int index) const override;
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void SetReg(int index, u64 value) override;
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void SetReg(int index, u64 value) override;
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const u128& GetExtReg(int index) const override;
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u128 GetExtReg(int index) const override;
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void SetExtReg(int index, u128& value) override;
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void SetExtReg(int index, u128 value) override;
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u32 GetVFPReg(int index) const override;
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u32 GetVFPReg(int index) const override;
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void SetVFPReg(int index, u32 value) override;
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void SetVFPReg(int index, u32 value) override;
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u32 GetCPSR() const override;
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u32 GetCPSR() const override;
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@ -35,4 +41,10 @@ public:
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void ClearInstructionCache() override;
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void ClearInstructionCache() override;
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void PageTableChanged() override;
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void PageTableChanged() override;
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private:
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friend class ARM_Dynarmic_Callbacks;
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std::unique_ptr<ARM_Dynarmic_Callbacks> cb;
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Dynarmic::A64::Jit jit;
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ARM_Unicorn inner_unicorn;
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};
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};
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@ -108,13 +108,13 @@ void ARM_Unicorn::SetReg(int regn, u64 val) {
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CHECKED(uc_reg_write(uc, treg, &val));
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CHECKED(uc_reg_write(uc, treg, &val));
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}
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}
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const u128& ARM_Unicorn::GetExtReg(int /*index*/) const {
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u128 ARM_Unicorn::GetExtReg(int /*index*/) const {
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UNIMPLEMENTED();
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UNIMPLEMENTED();
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static constexpr u128 res{};
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static constexpr u128 res{};
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return res;
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return res;
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}
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}
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void ARM_Unicorn::SetExtReg(int /*index*/, u128& /*value*/) {
|
void ARM_Unicorn::SetExtReg(int /*index*/, u128 /*value*/) {
|
||||||
UNIMPLEMENTED();
|
UNIMPLEMENTED();
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -168,10 +168,12 @@ void ARM_Unicorn::SaveContext(ARM_Interface::ThreadContext& ctx) {
|
|||||||
uregs[i] = UC_ARM64_REG_X0 + i;
|
uregs[i] = UC_ARM64_REG_X0 + i;
|
||||||
tregs[i] = &ctx.cpu_registers[i];
|
tregs[i] = &ctx.cpu_registers[i];
|
||||||
}
|
}
|
||||||
|
uregs[29] = UC_ARM64_REG_X29;
|
||||||
|
tregs[29] = (void*)&ctx.cpu_registers[29];
|
||||||
|
uregs[30] = UC_ARM64_REG_X30;
|
||||||
|
tregs[30] = (void*)&ctx.cpu_registers[30];
|
||||||
|
|
||||||
CHECKED(uc_reg_read_batch(uc, uregs, tregs, 29));
|
CHECKED(uc_reg_read_batch(uc, uregs, tregs, 31));
|
||||||
CHECKED(uc_reg_read(uc, UC_ARM64_REG_X29, &ctx.cpu_registers[29]));
|
|
||||||
CHECKED(uc_reg_read(uc, UC_ARM64_REG_X30, &ctx.lr));
|
|
||||||
|
|
||||||
ctx.tls_address = GetTlsAddress();
|
ctx.tls_address = GetTlsAddress();
|
||||||
|
|
||||||
@ -195,10 +197,12 @@ void ARM_Unicorn::LoadContext(const ARM_Interface::ThreadContext& ctx) {
|
|||||||
uregs[i] = UC_ARM64_REG_X0 + i;
|
uregs[i] = UC_ARM64_REG_X0 + i;
|
||||||
tregs[i] = (void*)&ctx.cpu_registers[i];
|
tregs[i] = (void*)&ctx.cpu_registers[i];
|
||||||
}
|
}
|
||||||
|
uregs[29] = UC_ARM64_REG_X29;
|
||||||
|
tregs[29] = (void*)&ctx.cpu_registers[29];
|
||||||
|
uregs[30] = UC_ARM64_REG_X30;
|
||||||
|
tregs[30] = (void*)&ctx.cpu_registers[30];
|
||||||
|
|
||||||
CHECKED(uc_reg_write_batch(uc, uregs, tregs, 29));
|
CHECKED(uc_reg_write_batch(uc, uregs, tregs, 31));
|
||||||
CHECKED(uc_reg_write(uc, UC_ARM64_REG_X29, &ctx.cpu_registers[29]));
|
|
||||||
CHECKED(uc_reg_write(uc, UC_ARM64_REG_X30, &ctx.lr));
|
|
||||||
|
|
||||||
SetTlsAddress(ctx.tls_address);
|
SetTlsAddress(ctx.tls_address);
|
||||||
|
|
||||||
|
@ -9,7 +9,6 @@
|
|||||||
#include "core/arm/arm_interface.h"
|
#include "core/arm/arm_interface.h"
|
||||||
|
|
||||||
class ARM_Unicorn final : public ARM_Interface {
|
class ARM_Unicorn final : public ARM_Interface {
|
||||||
|
|
||||||
public:
|
public:
|
||||||
ARM_Unicorn();
|
ARM_Unicorn();
|
||||||
~ARM_Unicorn();
|
~ARM_Unicorn();
|
||||||
@ -19,8 +18,8 @@ public:
|
|||||||
u64 GetPC() const override;
|
u64 GetPC() const override;
|
||||||
u64 GetReg(int index) const override;
|
u64 GetReg(int index) const override;
|
||||||
void SetReg(int index, u64 value) override;
|
void SetReg(int index, u64 value) override;
|
||||||
const u128& GetExtReg(int index) const override;
|
u128 GetExtReg(int index) const override;
|
||||||
void SetExtReg(int index, u128& value) override;
|
void SetExtReg(int index, u128 value) override;
|
||||||
u32 GetVFPReg(int index) const override;
|
u32 GetVFPReg(int index) const override;
|
||||||
void SetVFPReg(int index, u32 value) override;
|
void SetVFPReg(int index, u32 value) override;
|
||||||
u32 GetCPSR() const override;
|
u32 GetCPSR() const override;
|
||||||
|
@ -6,6 +6,7 @@
|
|||||||
#include <utility>
|
#include <utility>
|
||||||
#include "audio_core/audio_core.h"
|
#include "audio_core/audio_core.h"
|
||||||
#include "common/logging/log.h"
|
#include "common/logging/log.h"
|
||||||
|
#include "core/arm/dynarmic/arm_dynarmic.h"
|
||||||
#include "core/arm/unicorn/arm_unicorn.h"
|
#include "core/arm/unicorn/arm_unicorn.h"
|
||||||
#include "core/core.h"
|
#include "core/core.h"
|
||||||
#include "core/core_timing.h"
|
#include "core/core_timing.h"
|
||||||
@ -139,7 +140,8 @@ void System::Reschedule() {
|
|||||||
System::ResultStatus System::Init(EmuWindow* emu_window, u32 system_mode) {
|
System::ResultStatus System::Init(EmuWindow* emu_window, u32 system_mode) {
|
||||||
LOG_DEBUG(HW_Memory, "initialized OK");
|
LOG_DEBUG(HW_Memory, "initialized OK");
|
||||||
|
|
||||||
cpu_core = std::make_unique<ARM_Unicorn>();
|
// TODO: Configuration option
|
||||||
|
cpu_core = std::make_unique<ARM_Dynarmic>();
|
||||||
telemetry_session = std::make_unique<Core::TelemetrySession>();
|
telemetry_session = std::make_unique<Core::TelemetrySession>();
|
||||||
|
|
||||||
CoreTiming::Init();
|
CoreTiming::Init();
|
||||||
|
Loading…
Reference in New Issue
Block a user