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Merge pull request #750 from lioncash/ctx
arm_interface: Remove unused tls_address member of ThreadContext
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commit
de7cb91995
@ -20,9 +20,6 @@ public:
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u64 cpsr;
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std::array<u128, 32> fpu_registers;
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u64 fpscr;
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// TODO(bunnei): Fix once we have proper support for tpidrro_el0, etc. in the JIT
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VAddr tls_address;
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};
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/// Runs the CPU until an event happens
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@ -211,7 +211,6 @@ void ARM_Dynarmic::SaveContext(ARM_Interface::ThreadContext& ctx) {
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ctx.cpsr = jit->GetPstate();
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ctx.fpu_registers = jit->GetVectors();
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ctx.fpscr = jit->GetFpcr();
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ctx.tls_address = cb->tpidrro_el0;
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}
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void ARM_Dynarmic::LoadContext(const ARM_Interface::ThreadContext& ctx) {
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@ -221,7 +220,6 @@ void ARM_Dynarmic::LoadContext(const ARM_Interface::ThreadContext& ctx) {
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jit->SetPstate(static_cast<u32>(ctx.cpsr));
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jit->SetVectors(ctx.fpu_registers);
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jit->SetFpcr(static_cast<u32>(ctx.fpscr));
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cb->tpidrro_el0 = ctx.tls_address;
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}
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void ARM_Dynarmic::PrepareReschedule() {
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@ -230,8 +230,6 @@ void ARM_Unicorn::SaveContext(ARM_Interface::ThreadContext& ctx) {
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CHECKED(uc_reg_read_batch(uc, uregs, tregs, 31));
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ctx.tls_address = GetTlsAddress();
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for (int i = 0; i < 32; ++i) {
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uregs[i] = UC_ARM64_REG_Q0 + i;
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tregs[i] = &ctx.fpu_registers[i];
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@ -259,8 +257,6 @@ void ARM_Unicorn::LoadContext(const ARM_Interface::ThreadContext& ctx) {
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CHECKED(uc_reg_write_batch(uc, uregs, tregs, 31));
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SetTlsAddress(ctx.tls_address);
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for (auto i = 0; i < 32; ++i) {
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uregs[i] = UC_ARM64_REG_Q0 + i;
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tregs[i] = (void*)&ctx.fpu_registers[i];
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