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shader/other: Implement thread comparisons (NV_shader_thread_group)
Hardware S2R special registers match gl_Thread*MaskNV. We can trivially implement these using Nvidia's extension on OpenGL or naively stubbing them with the ARB instructions to match. This might cause issues if the host device warp size doesn't match Nvidia's. That said, this is unlikely on proper shaders. Refer to the attached url for more documentation about these flags. https://www.khronos.org/registry/OpenGL/extensions/NV/NV_shader_thread_group.txt
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@ -2309,6 +2309,18 @@ private:
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return {"gl_SubGroupInvocationARB", Type::Uint};
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}
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template <const std::string_view& comparison>
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Expression ThreadMask(Operation) {
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if (device.HasWarpIntrinsics()) {
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return {fmt::format("gl_Thread{}MaskNV", comparison), Type::Uint};
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}
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if (device.HasShaderBallot()) {
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return {fmt::format("uint(gl_SubGroup{}MaskARB)", comparison), Type::Uint};
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}
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LOG_ERROR(Render_OpenGL, "Thread mask intrinsics are required by the shader");
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return {"0U", Type::Uint};
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}
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Expression ShuffleIndexed(Operation operation) {
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std::string value = VisitOperand(operation, 0).AsFloat();
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@ -2337,6 +2349,12 @@ private:
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static constexpr std::string_view NotEqual = "!=";
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static constexpr std::string_view GreaterEqual = ">=";
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static constexpr std::string_view Eq = "Eq";
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static constexpr std::string_view Ge = "Ge";
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static constexpr std::string_view Gt = "Gt";
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static constexpr std::string_view Le = "Le";
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static constexpr std::string_view Lt = "Lt";
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static constexpr std::string_view Add = "Add";
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static constexpr std::string_view Min = "Min";
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static constexpr std::string_view Max = "Max";
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@ -2554,6 +2572,11 @@ private:
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&GLSLDecompiler::VoteEqual,
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&GLSLDecompiler::ThreadId,
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&GLSLDecompiler::ThreadMask<Func::Eq>,
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&GLSLDecompiler::ThreadMask<Func::Ge>,
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&GLSLDecompiler::ThreadMask<Func::Gt>,
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&GLSLDecompiler::ThreadMask<Func::Le>,
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&GLSLDecompiler::ThreadMask<Func::Lt>,
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&GLSLDecompiler::ShuffleIndexed,
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&GLSLDecompiler::MemoryBarrierGL,
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@ -515,6 +515,16 @@ private:
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void DeclareCommon() {
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thread_id =
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DeclareInputBuiltIn(spv::BuiltIn::SubgroupLocalInvocationId, t_in_uint, "thread_id");
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thread_masks[0] =
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DeclareInputBuiltIn(spv::BuiltIn::SubgroupEqMask, t_in_uint4, "thread_eq_mask");
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thread_masks[1] =
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DeclareInputBuiltIn(spv::BuiltIn::SubgroupGeMask, t_in_uint4, "thread_ge_mask");
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thread_masks[2] =
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DeclareInputBuiltIn(spv::BuiltIn::SubgroupGtMask, t_in_uint4, "thread_gt_mask");
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thread_masks[3] =
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DeclareInputBuiltIn(spv::BuiltIn::SubgroupLeMask, t_in_uint4, "thread_le_mask");
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thread_masks[4] =
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DeclareInputBuiltIn(spv::BuiltIn::SubgroupLtMask, t_in_uint4, "thread_lt_mask");
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}
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void DeclareVertex() {
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@ -2175,6 +2185,13 @@ private:
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return {OpLoad(t_uint, thread_id), Type::Uint};
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}
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template <std::size_t index>
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Expression ThreadMask(Operation) {
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// TODO(Rodrigo): Handle devices with different warp sizes
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const Id mask = thread_masks[index];
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return {OpLoad(t_uint, AccessElement(t_in_uint, mask, 0)), Type::Uint};
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}
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Expression ShuffleIndexed(Operation operation) {
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const Id value = AsFloat(Visit(operation[0]));
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const Id index = AsUint(Visit(operation[1]));
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@ -2639,6 +2656,11 @@ private:
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&SPIRVDecompiler::Vote<&Module::OpSubgroupAllEqualKHR>,
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&SPIRVDecompiler::ThreadId,
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&SPIRVDecompiler::ThreadMask<0>, // Eq
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&SPIRVDecompiler::ThreadMask<1>, // Ge
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&SPIRVDecompiler::ThreadMask<2>, // Gt
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&SPIRVDecompiler::ThreadMask<3>, // Le
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&SPIRVDecompiler::ThreadMask<4>, // Lt
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&SPIRVDecompiler::ShuffleIndexed,
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&SPIRVDecompiler::MemoryBarrierGL,
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@ -2763,6 +2785,7 @@ private:
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Id workgroup_id{};
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Id local_invocation_id{};
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Id thread_id{};
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std::array<Id, 5> thread_masks{}; // eq, ge, gt, le, lt
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VertexIndices in_indices;
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VertexIndices out_indices;
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@ -109,6 +109,27 @@ u32 ShaderIR::DecodeOther(NodeBlock& bb, u32 pc) {
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return Operation(OperationCode::WorkGroupIdY);
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case SystemVariable::CtaIdZ:
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return Operation(OperationCode::WorkGroupIdZ);
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case SystemVariable::EqMask:
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case SystemVariable::LtMask:
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case SystemVariable::LeMask:
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case SystemVariable::GtMask:
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case SystemVariable::GeMask:
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uses_warps = true;
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switch (instr.sys20) {
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case SystemVariable::EqMask:
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return Operation(OperationCode::ThreadEqMask);
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case SystemVariable::LtMask:
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return Operation(OperationCode::ThreadLtMask);
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case SystemVariable::LeMask:
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return Operation(OperationCode::ThreadLeMask);
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case SystemVariable::GtMask:
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return Operation(OperationCode::ThreadGtMask);
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case SystemVariable::GeMask:
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return Operation(OperationCode::ThreadGeMask);
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default:
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UNREACHABLE();
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return Immediate(0u);
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}
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default:
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UNIMPLEMENTED_MSG("Unhandled system move: {}",
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static_cast<u32>(instr.sys20.Value()));
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@ -226,6 +226,11 @@ enum class OperationCode {
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VoteEqual, /// (bool) -> bool
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ThreadId, /// () -> uint
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ThreadEqMask, /// () -> uint
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ThreadGeMask, /// () -> uint
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ThreadGtMask, /// () -> uint
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ThreadLeMask, /// () -> uint
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ThreadLtMask, /// () -> uint
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ShuffleIndexed, /// (uint value, uint index) -> uint
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MemoryBarrierGL, /// () -> void
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