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gl_shader_decompiler: Implement RRO as a register move.
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@ -297,8 +297,10 @@ public:
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FMUL_R,
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FMUL_IMM,
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FMUL32_IMM,
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MUFU, // Multi-Function Operator
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RRO, // Range Reduction Operator
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MUFU, // Multi-Function Operator
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RRO_C, // Range Reduction Operator
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RRO_R,
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RRO_IMM,
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F2F_C,
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F2F_R,
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F2F_IMM,
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@ -459,7 +461,9 @@ private:
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INST("0011100-01101---", Id::FMUL_IMM, Type::Arithmetic, "FMUL_IMM"),
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INST("00011110--------", Id::FMUL32_IMM, Type::Arithmetic, "FMUL32_IMM"),
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INST("0101000010000---", Id::MUFU, Type::Arithmetic, "MUFU"),
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INST("0101110010010---", Id::RRO, Type::Arithmetic, "RRO"),
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INST("0100110010010---", Id::RRO_C, Type::Arithmetic, "RRO_C"),
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INST("0101110010010---", Id::RRO_R, Type::Arithmetic, "RRO_R"),
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INST("0011100-10010---", Id::RRO_IMM, Type::Arithmetic, "RRO_IMM"),
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INST("0100110010101---", Id::F2F_C, Type::Conversion, "F2F_C"),
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INST("0101110010101---", Id::F2F_R, Type::Conversion, "F2F_R"),
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INST("0011100-10101---", Id::F2F_IMM, Type::Conversion, "F2F_IMM"),
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@ -792,8 +792,13 @@ private:
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1, 1);
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break;
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}
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case OpCode::Id::RRO: {
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NGLOG_DEBUG(HW_GPU, "Skipping RRO instruction");
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case OpCode::Id::RRO_C:
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case OpCode::Id::RRO_R:
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case OpCode::Id::RRO_IMM: {
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// Currently RRO is only implemented as a register move.
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// Usage of `abs_b` and `negate_b` here should also be correct.
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regs.SetRegisterToFloat(instr.gpr0, 0, op_b, 1, 1);
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NGLOG_WARNING(HW_GPU, "RRO instruction is incomplete");
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break;
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}
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default: {
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@ -897,8 +902,8 @@ private:
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const std::string op_b = regs.GetRegisterAsFloat(instr.gpr20);
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const std::string sampler = GetSampler(instr.sampler);
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const std::string coord = "vec2 coords = vec2(" + op_a + ", " + op_b + ");";
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// Add an extra scope and declare the texture coords inside to prevent overwriting
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// them in case they are used as outputs of the texs instruction.
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// Add an extra scope and declare the texture coords inside to prevent
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// overwriting them in case they are used as outputs of the texs instruction.
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shader.AddLine("{");
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++shader.scope;
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shader.AddLine(coord);
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@ -961,8 +966,8 @@ private:
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'(' + predicate + ") " + combiner + " (" + second_pred + ')');
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if (instr.fsetp.pred0 != static_cast<u64>(Pred::UnusedIndex)) {
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// Set the secondary predicate to the result of !Predicate OP SecondPredicate, if
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// enabled
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// Set the secondary predicate to the result of !Predicate OP SecondPredicate,
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// if enabled
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SetPredicate(instr.fsetp.pred0,
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"!(" + predicate + ") " + combiner + " (" + second_pred + ')');
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}
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