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gl_shader_decompiler: Implement several MUFU subops and abs_d.
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@ -241,12 +241,13 @@ private:
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* @param value the code representing the value to assign.
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*/
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void SetDest(u64 elem, const std::string& reg, const std::string& value,
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u64 dest_num_components, u64 value_num_components) {
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u64 dest_num_components, u64 value_num_components, bool is_abs = false) {
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std::string swizzle = ".";
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swizzle += "xyzw"[elem];
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std::string dest = reg + (dest_num_components != 1 ? swizzle : "");
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std::string src = "(" + value + ")" + (value_num_components != 1 ? swizzle : "");
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src = is_abs ? "abs(" + src + ")" : src;
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shader.AddLine(dest + " = " + src + ";");
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}
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@ -264,8 +265,6 @@ private:
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switch (OpCode::GetInfo(instr.opcode).type) {
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case OpCode::Type::Arithmetic: {
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ASSERT_MSG(!instr.alu.abs_d, "unimplemented");
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std::string dest = GetRegister(instr.gpr0);
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std::string op_a = instr.alu.negate_a ? "-" : "";
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op_a += GetRegister(instr.gpr8);
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@ -304,8 +303,26 @@ private:
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}
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case OpCode::Id::MUFU: {
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switch (instr.sub_op) {
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case SubOp::Cos:
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SetDest(0, dest, "cos(" + op_a + ")", 1, 1, instr.alu.abs_d);
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break;
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case SubOp::Sin:
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SetDest(0, dest, "sin(" + op_a + ")", 1, 1, instr.alu.abs_d);
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break;
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case SubOp::Ex2:
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SetDest(0, dest, "exp2(" + op_a + ")", 1, 1, instr.alu.abs_d);
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break;
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case SubOp::Lg2:
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SetDest(0, dest, "log2(" + op_a + ")", 1, 1, instr.alu.abs_d);
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break;
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case SubOp::Rcp:
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SetDest(0, dest, "1.0 / " + op_a, 1, 1);
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SetDest(0, dest, "1.0 / " + op_a, 1, 1, instr.alu.abs_d);
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break;
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case SubOp::Rsq:
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SetDest(0, dest, "inversesqrt(" + op_a + ")", 1, 1, instr.alu.abs_d);
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break;
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case SubOp::Min:
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SetDest(0, dest, "min(" + op_a + "," + op_b + ")", 1, 1, instr.alu.abs_d);
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break;
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default:
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LOG_ERROR(HW_GPU, "Unhandled sub op: 0x%02x", (int)instr.sub_op.Value());
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@ -324,9 +341,6 @@ private:
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break;
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}
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case OpCode::Type::Ffma: {
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ASSERT_MSG(!instr.ffma.negate_b, "untested");
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ASSERT_MSG(!instr.ffma.negate_c, "untested");
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std::string dest = GetRegister(instr.gpr0);
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std::string op_a = GetRegister(instr.gpr8);
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std::string op_b = instr.ffma.negate_b ? "-" : "";
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