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Add Swizzle Parameters to the DMA engine
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parent
e140e2ebc6
commit
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@ -25,7 +25,7 @@ void State::ProcessData(const u32 data, const bool is_last_call) {
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write_offset += sub_copy_size;
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if (is_last_call) {
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const GPUVAddr address{regs.dest.Address()};
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if (linear) {
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if (is_linear) {
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memory_manager.WriteBlock(address, inner_buffer.data(), copy_size);
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} else {
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UNIMPLEMENTED_IF(regs.dest.z != 0);
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@ -68,6 +68,16 @@ public:
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static_assert(sizeof(Parameters) == 24, "Parameters has wrong size");
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enum class ComponentMode : u32 {
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SRC0 = 0,
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SRC1 = 1,
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SRC2 = 2,
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SRC3 = 3,
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CONST0 = 4,
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CONST1 = 5,
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ZERO = 6,
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};
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enum class CopyMode : u32 {
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None = 0,
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Unk1 = 1,
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@ -133,7 +143,19 @@ public:
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u32 x_count;
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u32 y_count;
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INSERT_PADDING_WORDS(0xBB);
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INSERT_PADDING_WORDS(0xB8);
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u32 const0;
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u32 const1;
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union {
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BitField<0, 4, ComponentMode> component0;
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BitField<4, 4, ComponentMode> component1;
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BitField<8, 4, ComponentMode> component2;
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BitField<12, 4, ComponentMode> component3;
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BitField<16, 2, u32> component_size;
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BitField<20, 3, u32> src_num_components;
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BitField<24, 3, u32> dst_num_components;
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} swizzle_config;
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Parameters dst_params;
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@ -170,6 +192,9 @@ ASSERT_REG_POSITION(src_pitch, 0x104);
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ASSERT_REG_POSITION(dst_pitch, 0x105);
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ASSERT_REG_POSITION(x_count, 0x106);
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ASSERT_REG_POSITION(y_count, 0x107);
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ASSERT_REG_POSITION(const0, 0x1C0);
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ASSERT_REG_POSITION(const1, 0x1C1);
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ASSERT_REG_POSITION(swizzle_config, 0x1C2);
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ASSERT_REG_POSITION(dst_params, 0x1C3);
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ASSERT_REG_POSITION(src_params, 0x1CA);
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