From 7c181fd4f4940e34bf911dd8f32857b9059a974b Mon Sep 17 00:00:00 2001 From: Subv Date: Mon, 4 Jun 2018 11:12:03 -0500 Subject: [PATCH 1/2] GPU: Implemented the ISETP_R and ISETP_C shader instructions. --- src/video_core/engines/shader_bytecode.h | 10 +++++ .../renderer_opengl/gl_shader_decompiler.cpp | 38 +++++++++++++++++++ 2 files changed, 48 insertions(+) diff --git a/src/video_core/engines/shader_bytecode.h b/src/video_core/engines/shader_bytecode.h index da64430e99..83f7cc3a98 100644 --- a/src/video_core/engines/shader_bytecode.h +++ b/src/video_core/engines/shader_bytecode.h @@ -238,6 +238,16 @@ union Instruction { BitField<56, 1, u64> neg_b; } fsetp; + union { + BitField<0, 3, u64> pred0; + BitField<3, 3, u64> pred3; + BitField<39, 3, u64> pred39; + BitField<42, 1, u64> neg_pred; + BitField<45, 2, PredOperation> op; + BitField<48, 1, u64> is_signed; + BitField<49, 3, PredCondition> cond; + } isetp; + union { BitField<39, 3, u64> pred39; BitField<42, 1, u64> neg_pred; diff --git a/src/video_core/renderer_opengl/gl_shader_decompiler.cpp b/src/video_core/renderer_opengl/gl_shader_decompiler.cpp index bb5209a7ef..b27543a656 100644 --- a/src/video_core/renderer_opengl/gl_shader_decompiler.cpp +++ b/src/video_core/renderer_opengl/gl_shader_decompiler.cpp @@ -1017,6 +1017,44 @@ private: } break; } + case OpCode::Type::IntegerSetPredicate: { + std::string op_a = regs.GetRegisterAsInteger(instr.gpr8, 0, instr.isetp.is_signed); + + std::string op_b{}; + + ASSERT_MSG(!instr.is_b_imm, "ISETP_IMM not implemented"); + + if (instr.is_b_gpr) { + op_b += regs.GetRegisterAsInteger(instr.gpr20, 0, instr.isetp.is_signed); + } else { + // TODO(Subv): This family of instructions don't store to a GPR, but GetUniform + // needs to know the type of the output register. + op_b += regs.GetUniform(instr.uniform, instr.gpr0); + } + + using Tegra::Shader::Pred; + // We can't use the constant predicate as destination. + ASSERT(instr.isetp.pred3 != static_cast(Pred::UnusedIndex)); + + std::string second_pred = + GetPredicateCondition(instr.isetp.pred39, instr.isetp.neg_pred != 0); + + std::string comparator = GetPredicateComparison(instr.isetp.cond); + std::string combiner = GetPredicateCombiner(instr.isetp.op); + + std::string predicate = '(' + op_a + ") " + comparator + " (" + op_b + ')'; + // Set the primary predicate to the result of Predicate OP SecondPredicate + SetPredicate(instr.isetp.pred3, + '(' + predicate + ") " + combiner + " (" + second_pred + ')'); + + if (instr.isetp.pred0 != static_cast(Pred::UnusedIndex)) { + // Set the secondary predicate to the result of !Predicate OP SecondPredicate, + // if enabled + SetPredicate(instr.isetp.pred0, + "!(" + predicate + ") " + combiner + " (" + second_pred + ')'); + } + break; + } case OpCode::Type::FloatSet: { std::string op_a = instr.fset.neg_a ? "-" : ""; op_a += regs.GetRegisterAsFloat(instr.gpr8); From 90cddf1996216fe5a1058473dfc68ba43893407e Mon Sep 17 00:00:00 2001 From: Subv Date: Mon, 4 Jun 2018 11:22:26 -0500 Subject: [PATCH 2/2] GPU: Use explicit types when retrieving the uniform values for fsetp/fset and isetp instead of the type of an invalid output register. --- .../renderer_opengl/gl_shader_decompiler.cpp | 27 ++++++++++++------- 1 file changed, 18 insertions(+), 9 deletions(-) diff --git a/src/video_core/renderer_opengl/gl_shader_decompiler.cpp b/src/video_core/renderer_opengl/gl_shader_decompiler.cpp index b27543a656..618c603c24 100644 --- a/src/video_core/renderer_opengl/gl_shader_decompiler.cpp +++ b/src/video_core/renderer_opengl/gl_shader_decompiler.cpp @@ -197,6 +197,11 @@ public: return active_type == Type::Integer; } + /// Returns the current active type of the register + Type GetActiveType() const { + return active_type; + } + /// Returns the index of the register size_t GetIndex() const { return index; @@ -328,22 +333,28 @@ public: shader.AddLine(dest + " = " + src + ';'); } - /// Generates code representing a uniform (C buffer) register. - std::string GetUniform(const Uniform& uniform, const Register& dest_reg) { + /// Generates code representing a uniform (C buffer) register, interpreted as the input type. + std::string GetUniform(const Uniform& uniform, GLSLRegister::Type type) { declr_const_buffers[uniform.index].MarkAsUsed(static_cast(uniform.index), static_cast(uniform.offset), stage); std::string value = 'c' + std::to_string(uniform.index) + '[' + std::to_string(uniform.offset) + ']'; - if (regs[dest_reg].IsFloat()) { + if (type == GLSLRegister::Type::Float) { return value; - } else if (regs[dest_reg].IsInteger()) { + } else if (type == GLSLRegister::Type::Integer) { return "floatBitsToInt(" + value + ')'; } else { UNREACHABLE(); } } + /// Generates code representing a uniform (C buffer) register, interpreted as the type of the + /// destination register. + std::string GetUniform(const Uniform& uniform, const Register& dest_reg) { + return GetUniform(uniform, regs[dest_reg].GetActiveType()); + } + /// Add declarations for registers void GenerateDeclarations() { for (const auto& reg : regs) { @@ -986,7 +997,7 @@ private: if (instr.is_b_gpr) { op_b += regs.GetRegisterAsFloat(instr.gpr20); } else { - op_b += regs.GetUniform(instr.uniform, instr.gpr0); + op_b += regs.GetUniform(instr.uniform, GLSLRegister::Type::Float); } } @@ -1027,9 +1038,7 @@ private: if (instr.is_b_gpr) { op_b += regs.GetRegisterAsInteger(instr.gpr20, 0, instr.isetp.is_signed); } else { - // TODO(Subv): This family of instructions don't store to a GPR, but GetUniform - // needs to know the type of the output register. - op_b += regs.GetUniform(instr.uniform, instr.gpr0); + op_b += regs.GetUniform(instr.uniform, GLSLRegister::Type::Integer); } using Tegra::Shader::Pred; @@ -1075,7 +1084,7 @@ private: if (instr.is_b_gpr) { op_b += regs.GetRegisterAsFloat(instr.gpr20); } else { - op_b += regs.GetUniform(instr.uniform, instr.gpr0); + op_b += regs.GetUniform(instr.uniform, GLSLRegister::Type::Float); } }