From d2b50c5ebdb16fcea3370aa7cb7d25ad6ad51744 Mon Sep 17 00:00:00 2001 From: ReinUsesLisp Date: Fri, 1 Nov 2019 00:36:19 -0300 Subject: [PATCH 1/3] maxwell_3d: Add patch vertices register --- src/video_core/engines/maxwell_3d.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/src/video_core/engines/maxwell_3d.h b/src/video_core/engines/maxwell_3d.h index 4cb7339b57..884f2b0183 100644 --- a/src/video_core/engines/maxwell_3d.h +++ b/src/video_core/engines/maxwell_3d.h @@ -662,7 +662,9 @@ public: u32 polygon_offset_line_enable; u32 polygon_offset_fill_enable; - INSERT_UNION_PADDING_WORDS(0xD); + u32 patch_vertices; + + INSERT_UNION_PADDING_WORDS(0xC); std::array scissor_test; @@ -1397,6 +1399,7 @@ ASSERT_REG_POSITION(clear_stencil, 0x368); ASSERT_REG_POSITION(polygon_offset_point_enable, 0x370); ASSERT_REG_POSITION(polygon_offset_line_enable, 0x371); ASSERT_REG_POSITION(polygon_offset_fill_enable, 0x372); +ASSERT_REG_POSITION(patch_vertices, 0x373); ASSERT_REG_POSITION(scissor_test, 0x380); ASSERT_REG_POSITION(stencil_back_func_ref, 0x3D5); ASSERT_REG_POSITION(stencil_back_func_mask, 0x3D6); From 707bf41c6f3bb111407c884659a5a1e5757df53f Mon Sep 17 00:00:00 2001 From: ReinUsesLisp Date: Fri, 1 Nov 2019 00:43:59 -0300 Subject: [PATCH 2/3] maxwell_3d: Add tessellation mode register --- src/video_core/engines/maxwell_3d.h | 29 ++++++++++++++++++++++++++++- 1 file changed, 28 insertions(+), 1 deletion(-) diff --git a/src/video_core/engines/maxwell_3d.h b/src/video_core/engines/maxwell_3d.h index 884f2b0183..05d1820067 100644 --- a/src/video_core/engines/maxwell_3d.h +++ b/src/video_core/engines/maxwell_3d.h @@ -491,6 +491,23 @@ public: INSERT_UNION_PADDING_WORDS(1); }; + enum class DepthMode : u32 { + MinusOneToOne = 0, + ZeroToOne = 1, + }; + + enum class TessellationPrimitive : u32 { + Isolines = 0, + Triangles = 1, + Quads = 2, + }; + + enum class TessellationSpacing : u32 { + Equal = 0, + FractionalOdd = 1, + FractionalEven = 2, + }; + struct RenderTargetConfig { u32 address_high; u32 address_low; @@ -628,7 +645,16 @@ public: }; } sync_info; - INSERT_UNION_PADDING_WORDS(0x11E); + INSERT_UNION_PADDING_WORDS(0x15); + + union { + BitField<0, 2, TessellationPrimitive> prim; + BitField<4, 2, TessellationSpacing> spacing; + BitField<8, 1, u32> cw; + BitField<9, 1, u32> connected; + } tess_mode; + + INSERT_UNION_PADDING_WORDS(0x108); u32 tfb_enabled; @@ -1388,6 +1414,7 @@ ASSERT_REG_POSITION(upload, 0x60); ASSERT_REG_POSITION(exec_upload, 0x6C); ASSERT_REG_POSITION(data_upload, 0x6D); ASSERT_REG_POSITION(sync_info, 0xB2); +ASSERT_REG_POSITION(tess_mode, 0xC8); ASSERT_REG_POSITION(tfb_enabled, 0x1D1); ASSERT_REG_POSITION(rt, 0x200); ASSERT_REG_POSITION(viewport_transform, 0x280); From 36651f215a7b9bda242ebd389ef162e8381bf834 Mon Sep 17 00:00:00 2001 From: ReinUsesLisp Date: Fri, 1 Nov 2019 04:39:48 -0300 Subject: [PATCH 3/3] maxwell_3d: Add tessellation tess level registers --- src/video_core/engines/maxwell_3d.h | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/src/video_core/engines/maxwell_3d.h b/src/video_core/engines/maxwell_3d.h index 05d1820067..dcc7cd1fe8 100644 --- a/src/video_core/engines/maxwell_3d.h +++ b/src/video_core/engines/maxwell_3d.h @@ -654,7 +654,10 @@ public: BitField<9, 1, u32> connected; } tess_mode; - INSERT_UNION_PADDING_WORDS(0x108); + std::array tess_level_outer; + std::array tess_level_inner; + + INSERT_UNION_PADDING_WORDS(0x102); u32 tfb_enabled; @@ -1415,6 +1418,8 @@ ASSERT_REG_POSITION(exec_upload, 0x6C); ASSERT_REG_POSITION(data_upload, 0x6D); ASSERT_REG_POSITION(sync_info, 0xB2); ASSERT_REG_POSITION(tess_mode, 0xC8); +ASSERT_REG_POSITION(tess_level_outer, 0xC9); +ASSERT_REG_POSITION(tess_level_inner, 0xCD); ASSERT_REG_POSITION(tfb_enabled, 0x1D1); ASSERT_REG_POSITION(rt, 0x200); ASSERT_REG_POSITION(viewport_transform, 0x280);