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decode/register_set_predicate: Implement CC
P2R CC takes the state of condition codes and puts them into a register. We already have this implemented for PR (predicates). This commit implements CC over that.
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@ -17,15 +17,14 @@ using Tegra::Shader::Instruction;
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using Tegra::Shader::OpCode;
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namespace {
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constexpr u64 NUM_PROGRAMMABLE_PREDICATES = 7;
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}
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constexpr u64 NUM_CONDITION_CODES = 4;
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constexpr u64 NUM_PREDICATES = 7;
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} // namespace
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u32 ShaderIR::DecodeRegisterSetPredicate(NodeBlock& bb, u32 pc) {
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const Instruction instr = {program_code[pc]};
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const auto opcode = OpCode::Decode(instr);
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UNIMPLEMENTED_IF(instr.p2r_r2p.mode != Tegra::Shader::R2pMode::Pr);
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Node apply_mask = [this, opcode, instr] {
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switch (opcode->get().GetId()) {
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case OpCode::Id::R2P_IMM:
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@ -39,12 +38,18 @@ u32 ShaderIR::DecodeRegisterSetPredicate(NodeBlock& bb, u32 pc) {
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const u32 offset = static_cast<u32>(instr.p2r_r2p.byte) * 8;
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const bool cc = instr.p2r_r2p.mode == Tegra::Shader::R2pMode::Cc;
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const u64 num_entries = cc ? NUM_CONDITION_CODES : NUM_PREDICATES;
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const auto get_entry = [this, cc](u64 entry) {
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return cc ? GetInternalFlag(static_cast<InternalFlag>(entry)) : GetPredicate(entry);
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};
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switch (opcode->get().GetId()) {
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case OpCode::Id::R2P_IMM: {
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Node mask = GetRegister(instr.gpr8);
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for (u64 pred = 0; pred < NUM_PROGRAMMABLE_PREDICATES; ++pred) {
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const u32 shift = static_cast<u32>(pred);
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for (u64 entry = 0; entry < num_entries; ++entry) {
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const u32 shift = static_cast<u32>(entry);
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Node apply = BitfieldExtract(apply_mask, shift, 1);
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Node condition = Operation(OperationCode::LogicalUNotEqual, apply, Immediate(0));
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@ -52,15 +57,15 @@ u32 ShaderIR::DecodeRegisterSetPredicate(NodeBlock& bb, u32 pc) {
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Node compare = BitfieldExtract(mask, offset + shift, 1);
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Node value = Operation(OperationCode::LogicalUNotEqual, move(compare), Immediate(0));
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Node code = Operation(OperationCode::LogicalAssign, GetPredicate(pred), move(value));
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Node code = Operation(OperationCode::LogicalAssign, get_entry(entry), move(value));
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bb.push_back(Conditional(condition, {move(code)}));
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}
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break;
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}
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case OpCode::Id::P2R_IMM: {
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Node value = Immediate(0);
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for (u64 pred = 0; pred < NUM_PROGRAMMABLE_PREDICATES; ++pred) {
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Node bit = Operation(OperationCode::Select, GetPredicate(pred), Immediate(1U << pred),
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for (u64 entry = 0; entry < num_entries; ++entry) {
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Node bit = Operation(OperationCode::Select, get_entry(entry), Immediate(1U << entry),
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Immediate(0));
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value = Operation(OperationCode::UBitwiseOr, move(value), move(bit));
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}
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