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Added Saturation to FMUL32I
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@ -563,6 +563,10 @@ union Instruction {
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BitField<48, 1, u64> negate_b;
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} fmul;
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union {
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BitField<55, 1, u64> saturate;
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} fmul32;
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union {
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BitField<48, 1, u64> is_signed;
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} shift;
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@ -1459,9 +1459,10 @@ private:
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break;
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}
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case OpCode::Id::FMUL32_IMM: {
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regs.SetRegisterToFloat(
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instr.gpr0, 0,
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regs.GetRegisterAsFloat(instr.gpr8) + " * " + GetImmediate32(instr), 1, 1);
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regs.SetRegisterToFloat(instr.gpr0, 0,
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regs.GetRegisterAsFloat(instr.gpr8) + " * " +
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GetImmediate32(instr),
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1, 1, instr.fmul32.saturate);
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break;
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}
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case OpCode::Id::FADD32I: {
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