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shader: Implement ISET, add common_funcs
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@ -62,6 +62,8 @@ add_library(shader_recompiler STATIC
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frontend/maxwell/translate/impl/bitfield_extract.cpp
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frontend/maxwell/translate/impl/bitfield_insert.cpp
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frontend/maxwell/translate/impl/common_encoding.h
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frontend/maxwell/translate/impl/common_funcs.cpp
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frontend/maxwell/translate/impl/common_funcs.h
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frontend/maxwell/translate/impl/floating_point_add.cpp
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frontend/maxwell/translate/impl/floating_point_conversion_integer.cpp
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frontend/maxwell/translate/impl/floating_point_fused_multiply_add.cpp
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@ -72,6 +74,7 @@ add_library(shader_recompiler STATIC
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frontend/maxwell/translate/impl/impl.h
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frontend/maxwell/translate/impl/integer_add.cpp
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frontend/maxwell/translate/impl/integer_compare.cpp
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frontend/maxwell/translate/impl/integer_compare_and_set.cpp
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frontend/maxwell/translate/impl/integer_minimum_maximum.cpp
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frontend/maxwell/translate/impl/integer_popcount.cpp
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frontend/maxwell/translate/impl/integer_scaled_add.cpp
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@ -0,0 +1,46 @@
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// Copyright 2021 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include "shader_recompiler/frontend/maxwell/translate/impl/common_funcs.h"
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namespace Shader::Maxwell {
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[[nodiscard]] IR::U1 IntegerCompare(TranslatorVisitor& v, const IR::U32& operand_1,
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const IR::U32& operand_2, ComparisonOp compare_op,
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bool is_signed) {
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switch (compare_op) {
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case ComparisonOp::False:
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return v.ir.Imm1(false);
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case ComparisonOp::LessThan:
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return v.ir.ILessThan(operand_1, operand_2, is_signed);
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case ComparisonOp::Equal:
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return v.ir.IEqual(operand_1, operand_2);
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case ComparisonOp::LessThanEqual:
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return v.ir.ILessThanEqual(operand_1, operand_2, is_signed);
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case ComparisonOp::GreaterThan:
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return v.ir.IGreaterThan(operand_1, operand_2, is_signed);
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case ComparisonOp::NotEqual:
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return v.ir.INotEqual(operand_1, operand_2);
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case ComparisonOp::GreaterThanEqual:
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return v.ir.IGreaterThanEqual(operand_1, operand_2, is_signed);
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case ComparisonOp::True:
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return v.ir.Imm1(true);
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default:
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throw NotImplementedException("CMP");
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}
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}
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[[nodiscard]] IR::U1 PredicateCombine(TranslatorVisitor& v, const IR::U1& predicate_1,
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const IR::U1& predicate_2, BooleanOp bop) {
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switch (bop) {
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case BooleanOp::And:
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return v.ir.LogicalAnd(predicate_1, predicate_2);
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case BooleanOp::Or:
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return v.ir.LogicalOr(predicate_1, predicate_2);
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case BooleanOp::Xor:
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return v.ir.LogicalXor(predicate_1, predicate_2);
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default:
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throw NotImplementedException("BOP");
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}
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}
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} // namespace Shader::Maxwell
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@ -0,0 +1,17 @@
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// Copyright 2021 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#pragma once
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#include "common/common_types.h"
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#include "shader_recompiler/frontend/maxwell/translate/impl/impl.h"
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namespace Shader::Maxwell {
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[[nodiscard]] IR::U1 IntegerCompare(TranslatorVisitor& v, const IR::U32& operand_1,
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const IR::U32& operand_2, ComparisonOp compare_op,
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bool is_signed);
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[[nodiscard]] IR::U1 PredicateCombine(TranslatorVisitor& v, const IR::U1& predicate_1,
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const IR::U1& predicate_2, BooleanOp bop);
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} // namespace Shader::Maxwell
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@ -2,6 +2,8 @@
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#pragma once
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#include "shader_recompiler/environment.h"
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#include "shader_recompiler/frontend/ir/basic_block.h"
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#include "shader_recompiler/frontend/ir/ir_emitter.h"
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@ -9,6 +11,23 @@
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namespace Shader::Maxwell {
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enum class ComparisonOp : u64 {
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False,
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LessThan,
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Equal,
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LessThanEqual,
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GreaterThan,
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NotEqual,
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GreaterThanEqual,
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True,
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};
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enum class BooleanOp : u64 {
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And,
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Or,
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Xor,
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};
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class TranslatorVisitor {
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public:
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explicit TranslatorVisitor(Environment& env_, IR::Block& block) : env{env_}, ir(block) {}
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@ -4,46 +4,11 @@
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#include "common/bit_field.h"
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#include "common/common_types.h"
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#include "shader_recompiler/frontend/maxwell/translate/impl/common_funcs.h"
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#include "shader_recompiler/frontend/maxwell/translate/impl/impl.h"
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namespace Shader::Maxwell {
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namespace {
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enum class ComparisonOp : u64 {
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False,
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LessThan,
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Equal,
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LessThanEqual,
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GreaterThan,
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NotEqual,
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GreaterThanEqual,
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True,
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};
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[[nodiscard]] IR::U1 CompareToZero(TranslatorVisitor& v, const IR::U32& operand,
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ComparisonOp compare_op, bool is_signed) {
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const IR::U32 zero{v.ir.Imm32(0)};
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switch (compare_op) {
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case ComparisonOp::False:
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return v.ir.Imm1(false);
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case ComparisonOp::LessThan:
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return v.ir.ILessThan(operand, zero, is_signed);
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case ComparisonOp::Equal:
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return v.ir.IEqual(operand, zero);
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case ComparisonOp::LessThanEqual:
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return v.ir.ILessThanEqual(operand, zero, is_signed);
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case ComparisonOp::GreaterThan:
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return v.ir.IGreaterThan(operand, zero, is_signed);
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case ComparisonOp::NotEqual:
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return v.ir.INotEqual(operand, zero);
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case ComparisonOp::GreaterThanEqual:
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return v.ir.IGreaterThanEqual(operand, zero, is_signed);
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case ComparisonOp::True:
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return v.ir.Imm1(true);
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default:
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throw NotImplementedException("ICMP.CMP");
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}
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}
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void ICMP(TranslatorVisitor& v, u64 insn, const IR::U32& src_a, const IR::U32& operand) {
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union {
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u64 insn;
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@ -55,7 +20,7 @@ void ICMP(TranslatorVisitor& v, u64 insn, const IR::U32& src_a, const IR::U32& o
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const IR::U32 zero{v.ir.Imm32(0)};
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const bool is_signed{icmp.is_signed != 0};
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const IR::U1 cmp_result{CompareToZero(v, operand, icmp.compare_op, is_signed)};
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const IR::U1 cmp_result{IntegerCompare(v, operand, zero, icmp.compare_op, is_signed)};
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const IR::U32 src_reg{v.X(icmp.src_reg)};
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const IR::U32 result{v.ir.Select(cmp_result, src_reg, src_a)};
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@ -0,0 +1,62 @@
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// Copyright 2021 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include "common/bit_field.h"
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#include "common/common_types.h"
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#include "shader_recompiler/frontend/maxwell/translate/impl/common_funcs.h"
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#include "shader_recompiler/frontend/maxwell/translate/impl/impl.h"
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namespace Shader::Maxwell {
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namespace {
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void ISET(TranslatorVisitor& v, u64 insn, const IR::U32& src_a) {
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union {
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u64 insn;
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BitField<0, 8, IR::Reg> dest_reg;
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BitField<8, 8, IR::Reg> src_reg;
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BitField<39, 3, IR::Pred> pred;
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BitField<42, 1, u64> neg_pred;
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BitField<43, 1, u64> x;
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BitField<44, 1, u64> bf;
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BitField<45, 2, BooleanOp> bop;
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BitField<48, 1, u64> is_signed;
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BitField<49, 3, ComparisonOp> compare_op;
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} const iset{insn};
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if (iset.x != 0) {
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throw NotImplementedException("ISET.X");
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}
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const IR::U32 src_reg{v.X(iset.src_reg)};
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const bool is_signed{iset.is_signed != 0};
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IR::U1 pred{v.ir.GetPred(iset.pred)};
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if (iset.neg_pred != 0) {
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pred = v.ir.LogicalNot(pred);
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}
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const IR::U1 cmp_result{IntegerCompare(v, src_reg, src_a, iset.compare_op, is_signed)};
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const IR::U1 bop_result{PredicateCombine(v, cmp_result, pred, iset.bop)};
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const IR::U32 one_mask{v.ir.Imm32(-1)};
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const IR::U32 fp_one{v.ir.Imm32(0x3f800000)};
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const IR::U32 fail_result{v.ir.Imm32(0)};
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const IR::U32 pass_result{iset.bf == 0 ? one_mask : fp_one};
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const IR::U32 result{v.ir.Select(bop_result, pass_result, fail_result)};
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v.X(iset.dest_reg, result);
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}
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} // Anonymous namespace
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void TranslatorVisitor::ISET_reg(u64 insn) {
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ISET(*this, insn, GetReg20(insn));
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}
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void TranslatorVisitor::ISET_cbuf(u64 insn) {
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ISET(*this, insn, GetCbuf(insn));
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}
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void TranslatorVisitor::ISET_imm(u64 insn) {
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ISET(*this, insn, GetImm20(insn));
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}
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} // namespace Shader::Maxwell
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@ -23,7 +23,7 @@ void IMNMX(TranslatorVisitor& v, u64 insn, const IR::U32& op_b) {
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throw NotImplementedException("IMNMX.MODE");
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}
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IR::U1 pred{v.ir.GetPred(imnmx.pred)};
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const IR::U1 pred{v.ir.GetPred(imnmx.pred)};
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const IR::U32 op_a{v.X(imnmx.src_reg)};
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IR::U32 min;
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IR::U32 max;
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@ -457,18 +457,6 @@ void TranslatorVisitor::ISBERD(u64) {
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ThrowNotImplemented(Opcode::ISBERD);
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}
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void TranslatorVisitor::ISET_reg(u64) {
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ThrowNotImplemented(Opcode::ISET_reg);
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}
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void TranslatorVisitor::ISET_cbuf(u64) {
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ThrowNotImplemented(Opcode::ISET_cbuf);
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}
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void TranslatorVisitor::ISET_imm(u64) {
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ThrowNotImplemented(Opcode::ISET_imm);
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}
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void TranslatorVisitor::JCAL(u64) {
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ThrowNotImplemented(Opcode::JCAL);
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}
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